From: Anuj Phogat <anuj.phogat@gmail.com>
Date: Sat, 5 Jan 2019 00:04:07 +0000 (-0800)
Subject: intel/gen12: Add L3 configurations
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=414cae0fd656d84d8447ccfed92ad7f9446113fa;p=mesa.git

intel/gen12: Add L3 configurations

Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
---

diff --git a/src/intel/common/gen_l3_config.c b/src/intel/common/gen_l3_config.c
index e8db6d5ec06..19ea07eef2d 100644
--- a/src/intel/common/gen_l3_config.c
+++ b/src/intel/common/gen_l3_config.c
@@ -146,6 +146,15 @@ static const struct gen_l3_config icl_l3_configs[] = {
    {{  0 }}
 };
 
+/**
+ * TGL validated L3 configurations.  \sa tgl_l3_configs.
+ */
+static const struct gen_l3_config tgl_l3_configs[] = {
+   /* SLM URB ALL DC  RO  IS   C   T */
+   {{  0, 32,  88,  0,  0,  0,  0,  0 }},
+   {{  0, 16, 104,  0,  0,  0,  0,  0 }},
+   {{  0 }}
+};
 
 /**
  * Return a zero-terminated array of validated L3 configurations for the
@@ -170,9 +179,11 @@ get_l3_configs(const struct gen_device_info *devinfo)
       return cnl_l3_configs;
 
    case 11:
-   case 12:
       return icl_l3_configs;
 
+   case 12:
+      return tgl_l3_configs;
+
    default:
       unreachable("Not implemented");
    }