From: Maciej W. Rozycki <macro@imgtec.com>
Date: Fri, 30 Jun 2017 06:21:56 +0000 (+0100)
Subject: MIPS: Add Imagination interAptiv MR2 MIPS32r3 processor support (ChangeLog)
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=4151f6842850876e93c8e5d870d7c9147065788d;p=binutils-gdb.git

MIPS: Add Imagination interAptiv MR2 MIPS32r3 processor support (ChangeLog)

Correct ChangeLog entry for commit 38bf472a1521 ("MIPS: Add Imagination
interAptiv MR2 MIPS32r3 processor support").
---

diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog
index 81c94e4de29..f3c0c62b403 100644
--- a/opcodes/ChangeLog
+++ b/opcodes/ChangeLog
@@ -56,7 +56,7 @@
 
 2017-06-28  Maciej W. Rozycki  <macro@imgtec.com>
 	    Matthew Fortune  <matthew.fortune@imgtec.com>
-	    Andrew Bennett <andrew.bennett@imgtec.com>
+	    Andrew Bennett  <andrew.bennett@imgtec.com>
 
 	* mips-formats.h (INT_BIAS): New macro.
 	(INT_ADJ): Redefine in INT_BIAS terms.