From: Luke Kenneth Casson Leighton <lkcl@lkcl.net>
Date: Mon, 21 Sep 2020 18:45:38 +0000 (+0100)
Subject: add missing file
X-Git-Tag: 24jan2021_ls180~363
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=41712586964177b5542087cd27e591eb31f34033;p=soc.git

add missing file
---

diff --git a/src/soc/fu/mmu/mmu_input_record.py b/src/soc/fu/mmu/mmu_input_record.py
new file mode 100644
index 00000000..f063e2ea
--- /dev/null
+++ b/src/soc/fu/mmu/mmu_input_record.py
@@ -0,0 +1,18 @@
+from soc.fu.base_input_record import CompOpSubsetBase
+from soc.decoder.power_enums import (MicrOp, Function)
+
+
+class CompMMUOpSubset(CompOpSubsetBase):
+    """CompMMUOpSubset
+
+    a copy of the relevant subset information from Decode2Execute1Type
+    needed for MMU operations.  use with eq_from_execute1 (below) to
+    grab subsets.
+    """
+    def __init__(self, name=None):
+        layout = (('insn_type', MicrOp),
+                  ('fn_unit', Function),
+                  ('insn', 32),
+                  ('zero_a', 1),
+                  )
+        super().__init__(layout, name=name)