From: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Date: Wed, 25 Sep 2019 01:26:36 +0000 (+1000)
Subject: Move fetch2 <-> icache definitions
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=41a4eb82716d4199263ebed493d941d1d1300ab7;p=microwatt.git

Move fetch2 <-> icache definitions

To a more logical place before decode related ones

Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
---

diff --git a/common.vhdl b/common.vhdl
index 8f30d95..bb898a0 100644
--- a/common.vhdl
+++ b/common.vhdl
@@ -16,6 +16,16 @@ package common is
 	    nia: std_ulogic_vector(63 downto 0);
 	end record;
 
+	type Fetch2ToIcacheType is record
+		req: std_ulogic;
+		addr: std_ulogic_vector(63 downto 0);
+	end record;
+
+	type IcacheToFetch2Type is record
+		ack: std_ulogic;
+		insn: std_ulogic_vector(31 downto 0);
+	end record;
+
 	type Fetch2ToDecode1Type is record
 		valid: std_ulogic;
 		stop_mark : std_ulogic;
@@ -33,16 +43,6 @@ package common is
 	end record;
 	constant Decode1ToDecode2Init : Decode1ToDecode2Type := (valid => '0', stop_mark => '0', decode => decode_rom_init, others => (others => '0'));
 
-	type Fetch2ToIcacheType is record
-		req: std_ulogic;
-		addr: std_ulogic_vector(63 downto 0);
-	end record;
-
-	type IcacheToFetch2Type is record
-		ack: std_ulogic;
-		insn: std_ulogic_vector(31 downto 0);
-	end record;
-
 	type Decode2ToExecute1Type is record
 		valid: std_ulogic;
 		insn_type: insn_type_t;