From: Andrew Cagney Date: Sat, 15 Nov 2003 22:09:07 +0000 (+0000) Subject: 2003-11-15 Andrew Cagney X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=4246e332ce0f989e7c0dd9288e3fd4058ba36353;p=binutils-gdb.git 2003-11-15 Andrew Cagney Replace MIPS_REGSIZE with mips_regsize. * mips-tdep.c (mips_regsize): New function. * mips-tdep.h (mips_regsize): Declare. * mipsnbsd-tdep.h (SIZEOF_STRUCT_FPREG): Update. (SIZEOF_STRUCT_REG): Update. * mipsnbsd-tdep.c (mipsnbsd_supply_reg): Update. (mipsnbsd_fill_reg): Update. (mipsnbsd_supply_fpreg): Update. (mipsnbsd_fill_fpreg): Update. (NBSD_MIPS_JB_ELEMENT_SIZE): Update. * mips-tdep.c (mips_register_raw_size): Update. (mips_register_type): Update. (SIGFRAME_BASE): Update. (SIGFRAME_PC_OFF): Update. (SIGFRAME_REGSAVE_OFF): Update. (SIGFRAME_FPREGSAVE_OFF): Update. (SIGFRAME_REG_SIZE): Update. (mips32_heuristic_proc_desc): Update. (print_gp_register_row): Update. (mips_dump_tdep): Do not print MIPS_REGSIZE. * irix5-nat.c (supply_gregset): Update. (fetch_core_registers): Update. * config/mips/tm-mips64.h (MIPS_REGSIZE): Delete macro. * config/mips/tm-irix6.h (MIPS_REGISTER_BYTE): Update. * config/mips/tm-mips.h (MIPS_REGSIZE): Delete macro. (MIPS_REGISTER_BYTE): Update. * config/mips/tm-irix5.h (MIPS_REGISTER_BYTE): Update. --- diff --git a/gdb/ChangeLog b/gdb/ChangeLog index abe31523cd9..37e6deb7329 100644 --- a/gdb/ChangeLog +++ b/gdb/ChangeLog @@ -1,3 +1,33 @@ +2003-11-15 Andrew Cagney + + Replace MIPS_REGSIZE with mips_regsize. + * mips-tdep.c (mips_regsize): New function. + * mips-tdep.h (mips_regsize): Declare. + * mipsnbsd-tdep.h (SIZEOF_STRUCT_FPREG): Update. + (SIZEOF_STRUCT_REG): Update. + * mipsnbsd-tdep.c (mipsnbsd_supply_reg): Update. + (mipsnbsd_fill_reg): Update. + (mipsnbsd_supply_fpreg): Update. + (mipsnbsd_fill_fpreg): Update. + (NBSD_MIPS_JB_ELEMENT_SIZE): Update. + * mips-tdep.c (mips_register_raw_size): Update. + (mips_register_type): Update. + (SIGFRAME_BASE): Update. + (SIGFRAME_PC_OFF): Update. + (SIGFRAME_REGSAVE_OFF): Update. + (SIGFRAME_FPREGSAVE_OFF): Update. + (SIGFRAME_REG_SIZE): Update. + (mips32_heuristic_proc_desc): Update. + (print_gp_register_row): Update. + (mips_dump_tdep): Do not print MIPS_REGSIZE. + * irix5-nat.c (supply_gregset): Update. + (fetch_core_registers): Update. + * config/mips/tm-mips64.h (MIPS_REGSIZE): Delete macro. + * config/mips/tm-irix6.h (MIPS_REGISTER_BYTE): Update. + * config/mips/tm-mips.h (MIPS_REGSIZE): Delete macro. + (MIPS_REGISTER_BYTE): Update. + * config/mips/tm-irix5.h (MIPS_REGISTER_BYTE): Update. + 2003-11-15 Andrew Cagney * config/sparc/tm-sparc.h (DEPRECATE_USE_REGISTER_NOT_ARG): Rename diff --git a/gdb/config/mips/tm-irix5.h b/gdb/config/mips/tm-irix5.h index 61e809debd1..d7e1938aa00 100644 --- a/gdb/config/mips/tm-irix5.h +++ b/gdb/config/mips/tm-irix5.h @@ -78,11 +78,11 @@ #undef MIPS_REGISTER_BYTE #define MIPS_REGISTER_BYTE(N) \ - (((N) < FP0_REGNUM) ? (N) * MIPS_REGSIZE : \ + (((N) < FP0_REGNUM) ? (N) * mips_regsize (current_gdbarch) : \ ((N) < FP0_REGNUM + 32) ? \ - FP0_REGNUM * MIPS_REGSIZE + \ + FP0_REGNUM * mips_regsize (current_gdbarch) + \ ((N) - FP0_REGNUM) * sizeof(double) : \ - 32 * sizeof(double) + ((N) - 32) * MIPS_REGSIZE) + 32 * sizeof(double) + ((N) - 32) * mips_regsize (current_gdbarch)) #undef MIPS_REGISTER_TYPE #define MIPS_REGISTER_TYPE(N) \ diff --git a/gdb/config/mips/tm-irix6.h b/gdb/config/mips/tm-irix6.h index 0d4fc0c2a35..4d63001c2b1 100644 --- a/gdb/config/mips/tm-irix6.h +++ b/gdb/config/mips/tm-irix6.h @@ -64,11 +64,11 @@ #undef MIPS_REGISTER_BYTE #define MIPS_REGISTER_BYTE(N) \ - (((N) < FP0_REGNUM) ? (N) * MIPS_REGSIZE : \ + (((N) < FP0_REGNUM) ? (N) * mips_regsize (current_gdbarch) : \ ((N) < FP0_REGNUM + 32) ? \ - FP0_REGNUM * MIPS_REGSIZE + \ + FP0_REGNUM * mips_regsize (current_gdbarch) + \ ((N) - FP0_REGNUM) * sizeof(double) : \ - 32 * sizeof(double) + ((N) - 32) * MIPS_REGSIZE) + 32 * sizeof(double) + ((N) - 32) * mips_regsize (current_gdbarch)) /* The signal handler trampoline is called _sigtramp. */ #undef IN_SIGTRAMP diff --git a/gdb/config/mips/tm-mips.h b/gdb/config/mips/tm-mips.h index 59aeb5dcc2a..35aa8888774 100644 --- a/gdb/config/mips/tm-mips.h +++ b/gdb/config/mips/tm-mips.h @@ -45,12 +45,6 @@ extern int mips_step_skips_delay (CORE_ADDR); #define STEP_SKIPS_DELAY_P (1) #define STEP_SKIPS_DELAY(pc) (mips_step_skips_delay (pc)) -/* The size of a register. This is predefined in tm-mips64.h. */ - -#ifndef MIPS_REGSIZE -#define MIPS_REGSIZE 4 -#endif - /* Initializer for an array of names for registers 32 and above. There should be NUM_REGS-32 strings in this initializer. */ @@ -98,7 +92,7 @@ extern int mips_step_skips_delay (CORE_ADDR); /* Index within `registers' of the first byte of the space for register N. */ -#define MIPS_REGISTER_BYTE(N) ((N) * MIPS_REGSIZE) +#define MIPS_REGISTER_BYTE(N) ((N) * mips_regsize (current_gdbarch)) /* Return the GDB type object for the "standard" data type of data in register N. */ diff --git a/gdb/config/mips/tm-mips64.h b/gdb/config/mips/tm-mips64.h index 2547e86f482..bce76cfb6fb 100644 --- a/gdb/config/mips/tm-mips64.h +++ b/gdb/config/mips/tm-mips64.h @@ -19,9 +19,6 @@ Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ -/* Use eight byte registers. */ -#define MIPS_REGSIZE 8 - /* define 8 byte register type */ #define MIPS_REGISTER_TYPE(N) \ (((N) >= FP0_REGNUM && (N) < FP0_REGNUM+32) ? builtin_type_double \ diff --git a/gdb/irix5-nat.c b/gdb/irix5-nat.c index 224d376f97f..de27ef1e893 100644 --- a/gdb/irix5-nat.c +++ b/gdb/irix5-nat.c @@ -55,7 +55,7 @@ supply_gregset (gregset_t *gregsetp) { int regi; greg_t *regp = &(*gregsetp)[0]; - int gregoff = sizeof (greg_t) - MIPS_REGSIZE; + int gregoff = sizeof (greg_t) - mips_regsize (current_gdbarch); static char zerobuf[32] = {0}; for (regi = 0; regi <= CTX_RA; regi++) @@ -200,8 +200,8 @@ fetch_core_registers (char *core_reg_sect, unsigned core_reg_size, { memcpy ((char *) deprecated_registers, core_reg_sect, core_reg_size); } - else if (MIPS_REGSIZE == 4 && - core_reg_size == (2 * MIPS_REGSIZE) * NUM_REGS) + else if (mips_regsize (current_gdbarch) == 4 && + core_reg_size == (2 * mips_regsize (current_gdbarch)) * NUM_REGS) { /* This is a core file from a N32 executable, 64 bits are saved for all registers. */ diff --git a/gdb/mips-linux-tdep.c b/gdb/mips-linux-tdep.c index 20ada7b9477..01274ed04df 100644 --- a/gdb/mips-linux-tdep.c +++ b/gdb/mips-linux-tdep.c @@ -85,8 +85,8 @@ mips_linux_get_longjmp_target (CORE_ADDR *pc) return 1; } -/* Transform the bits comprising a 32-bit register to the right - size for supply_register(). This is needed when MIPS_REGSIZE is 8. */ +/* Transform the bits comprising a 32-bit register to the right size + for supply_register(). This is needed when mips_regsize() is 8. */ static void supply_32bit_reg (int regnum, const void *addr) diff --git a/gdb/mips-tdep.c b/gdb/mips-tdep.c index d60c29eac98..6a3e5c3031f 100644 --- a/gdb/mips-tdep.c +++ b/gdb/mips-tdep.c @@ -213,6 +213,13 @@ mips_abi (struct gdbarch *gdbarch) return gdbarch_tdep (gdbarch)->mips_abi; } +int +mips_regsize (struct gdbarch *gdbarch) +{ + return (gdbarch_bfd_arch_info (gdbarch)->bits_per_word + / gdbarch_bfd_arch_info (gdbarch)->bits_per_byte); +} + static unsigned int mips_saved_regsize (void) { @@ -641,7 +648,7 @@ mips_register_raw_size (int regnum) registers. */ return 8; else - return MIPS_REGSIZE; + return mips_regsize (current_gdbarch); } else if (regnum < 2 * NUM_REGS) { @@ -782,7 +789,7 @@ mips_register_type (struct gdbarch *gdbarch, int regnum) { /* Everything else... Return type appropriate for width of register. */ - if (MIPS_REGSIZE == TYPE_LENGTH (builtin_type_uint64)) + if (mips_regsize (current_gdbarch) == TYPE_LENGTH (builtin_type_uint64)) return builtin_type_uint64; else return builtin_type_uint32; @@ -1559,16 +1566,16 @@ mips_find_saved_regs (struct frame_info *fci) #ifndef SIGFRAME_BASE /* To satisfy alignment restrictions, sigcontext is located 4 bytes above the sigtramp frame. */ -#define SIGFRAME_BASE MIPS_REGSIZE +#define SIGFRAME_BASE mips_regsize (current_gdbarch) /* FIXME! Are these correct?? */ -#define SIGFRAME_PC_OFF (SIGFRAME_BASE + 2 * MIPS_REGSIZE) -#define SIGFRAME_REGSAVE_OFF (SIGFRAME_BASE + 3 * MIPS_REGSIZE) +#define SIGFRAME_PC_OFF (SIGFRAME_BASE + 2 * mips_regsize (current_gdbarch)) +#define SIGFRAME_REGSAVE_OFF (SIGFRAME_BASE + 3 * mips_regsize (current_gdbarch)) #define SIGFRAME_FPREGSAVE_OFF \ - (SIGFRAME_REGSAVE_OFF + MIPS_NUMREGS * MIPS_REGSIZE + 3 * MIPS_REGSIZE) + (SIGFRAME_REGSAVE_OFF + MIPS_NUMREGS * mips_regsize (current_gdbarch) + 3 * mips_regsize (current_gdbarch)) #endif #ifndef SIGFRAME_REG_SIZE /* FIXME! Is this correct?? */ -#define SIGFRAME_REG_SIZE MIPS_REGSIZE +#define SIGFRAME_REG_SIZE mips_regsize (current_gdbarch) #endif if ((get_frame_type (fci) == SIGTRAMP_FRAME)) { @@ -2252,7 +2259,7 @@ restart: but the register size used is only 32 bits. Make the address for the saved register point to the lower 32 bits. */ PROC_REG_MASK (&temp_proc_desc) |= 1 << reg; - set_reg_offset (temp_saved_regs, reg, sp + low_word + 8 - MIPS_REGSIZE); + set_reg_offset (temp_saved_regs, reg, sp + low_word + 8 - mips_regsize (current_gdbarch)); } else if (high_word == 0x27be) /* addiu $30,$sp,size */ { @@ -2960,10 +2967,11 @@ mips_eabi_push_dummy_call (struct gdbarch *gdbarch, CORE_ADDR func_addr, /* Copy the argument to general registers or the stack in register-sized pieces. Large arguments are split between registers and stack. */ - /* Note: structs whose size is not a multiple of MIPS_REGSIZE - are treated specially: Irix cc passes them in registers - where gcc sometimes puts them on the stack. For maximum - compatibility, we will put them in both places. */ + /* Note: structs whose size is not a multiple of + mips_regsize() are treated specially: Irix cc passes them + in registers where gcc sometimes puts them on the stack. + For maximum compatibility, we will put them in both + places. */ int odd_sized_struct = ((len > MIPS_SAVED_REGSIZE) && (len % MIPS_SAVED_REGSIZE != 0)); @@ -3167,10 +3175,11 @@ mips_n32n64_push_dummy_call (struct gdbarch *gdbarch, CORE_ADDR func_addr, /* Copy the argument to general registers or the stack in register-sized pieces. Large arguments are split between registers and stack. */ - /* Note: structs whose size is not a multiple of MIPS_REGSIZE - are treated specially: Irix cc passes them in registers - where gcc sometimes puts them on the stack. For maximum - compatibility, we will put them in both places. */ + /* Note: structs whose size is not a multiple of + mips_regsize() are treated specially: Irix cc passes them + in registers where gcc sometimes puts them on the stack. + For maximum compatibility, we will put them in both + places. */ int odd_sized_struct = ((len > MIPS_SAVED_REGSIZE) && (len % MIPS_SAVED_REGSIZE != 0)); /* Note: Floating-point values that didn't fit into an FP @@ -3457,10 +3466,11 @@ mips_o32_push_dummy_call (struct gdbarch *gdbarch, CORE_ADDR func_addr, /* Copy the argument to general registers or the stack in register-sized pieces. Large arguments are split between registers and stack. */ - /* Note: structs whose size is not a multiple of MIPS_REGSIZE - are treated specially: Irix cc passes them in registers - where gcc sometimes puts them on the stack. For maximum - compatibility, we will put them in both places. */ + /* Note: structs whose size is not a multiple of + mips_regsize() are treated specially: Irix cc passes them + in registers where gcc sometimes puts them on the stack. + For maximum compatibility, we will put them in both + places. */ int odd_sized_struct = ((len > MIPS_SAVED_REGSIZE) && (len % MIPS_SAVED_REGSIZE != 0)); /* Structures should be aligned to eight bytes (even arg registers) @@ -3536,8 +3546,8 @@ mips_o32_push_dummy_call (struct gdbarch *gdbarch, CORE_ADDR func_addr, && !fp_register_arg_p (typecode, arg_type)) { LONGEST regval = extract_signed_integer (val, partial_len); - /* Value may need to be sign extended, because - MIPS_REGSIZE != MIPS_SAVED_REGSIZE. */ + /* Value may need to be sign extended, because + mips_regsize() != MIPS_SAVED_REGSIZE. */ /* A non-floating-point argument being passed in a general register. If a struct or union, and if @@ -3765,10 +3775,11 @@ mips_o64_push_dummy_call (struct gdbarch *gdbarch, CORE_ADDR func_addr, /* Copy the argument to general registers or the stack in register-sized pieces. Large arguments are split between registers and stack. */ - /* Note: structs whose size is not a multiple of MIPS_REGSIZE - are treated specially: Irix cc passes them in registers - where gcc sometimes puts them on the stack. For maximum - compatibility, we will put them in both places. */ + /* Note: structs whose size is not a multiple of + mips_regsize() are treated specially: Irix cc passes them + in registers where gcc sometimes puts them on the stack. + For maximum compatibility, we will put them in both + places. */ int odd_sized_struct = ((len > MIPS_SAVED_REGSIZE) && (len % MIPS_SAVED_REGSIZE != 0)); /* Structures should be aligned to eight bytes (even arg registers) @@ -3844,8 +3855,8 @@ mips_o64_push_dummy_call (struct gdbarch *gdbarch, CORE_ADDR func_addr, && !fp_register_arg_p (typecode, arg_type)) { LONGEST regval = extract_signed_integer (val, partial_len); - /* Value may need to be sign extended, because - MIPS_REGSIZE != MIPS_SAVED_REGSIZE. */ + /* Value may need to be sign extended, because + mips_regsize() != MIPS_SAVED_REGSIZE. */ /* A non-floating-point argument being passed in a general register. If a struct or union, and if @@ -4238,7 +4249,7 @@ print_gp_register_row (struct ui_file *file, struct frame_info *frame, struct gdbarch *gdbarch = get_frame_arch (frame); /* do values for GP (int) regs */ char raw_buffer[MAX_REGISTER_SIZE]; - int ncols = (MIPS_REGSIZE == 8 ? 4 : 8); /* display cols per row */ + int ncols = (mips_regsize (gdbarch) == 8 ? 4 : 8); /* display cols per row */ int col, byte; int regnum; @@ -4252,7 +4263,7 @@ print_gp_register_row (struct ui_file *file, struct frame_info *frame, continue; /* unused register */ if (TYPE_CODE (gdbarch_register_type (gdbarch, regnum)) == TYPE_CODE_FLT) break; /* end the row: reached FP register */ - fprintf_filtered (file, MIPS_REGSIZE == 8 ? "%17s" : "%9s", + fprintf_filtered (file, mips_regsize (current_gdbarch) == 8 ? "%17s" : "%9s", REGISTER_NAME (regnum)); col++; } @@ -4275,7 +4286,10 @@ print_gp_register_row (struct ui_file *file, struct frame_info *frame, if (!frame_register_read (frame, regnum, raw_buffer)) error ("can't read register %d (%s)", regnum, REGISTER_NAME (regnum)); /* pad small registers */ - for (byte = 0; byte < (MIPS_REGSIZE - DEPRECATED_REGISTER_VIRTUAL_SIZE (regnum)); byte++) + for (byte = 0; + byte < (mips_regsize (current_gdbarch) + - DEPRECATED_REGISTER_VIRTUAL_SIZE (regnum)); + byte++) printf_filtered (" "); /* Now print the register value in hex, endian order. */ if (TARGET_BYTE_ORDER == BFD_ENDIAN_BIG) @@ -6236,9 +6250,6 @@ mips_dump_tdep (struct gdbarch *current_gdbarch, struct ui_file *file) fprintf_unfiltered (file, "mips_dump_tdep: MIPS_STACK_ARGSIZE = %d\n", MIPS_STACK_ARGSIZE); - fprintf_unfiltered (file, - "mips_dump_tdep: MIPS_REGSIZE = %d\n", - MIPS_REGSIZE); fprintf_unfiltered (file, "mips_dump_tdep: A0_REGNUM = %d\n", A0_REGNUM); diff --git a/gdb/mips-tdep.h b/gdb/mips-tdep.h index 5d3aa85692d..e7cf3f916c8 100644 --- a/gdb/mips-tdep.h +++ b/gdb/mips-tdep.h @@ -1,6 +1,6 @@ /* Target-dependent header for the MIPS architecture, for GDB, the GNU Debugger. - Copyright 2002 Free Software Foundation, Inc. + Copyright 2002, 2003 Free Software Foundation, Inc. This file is part of GDB. @@ -43,4 +43,8 @@ enum mips_abi mips_abi (struct gdbarch *gdbarch); /* For wince :-(. */ extern CORE_ADDR mips_next_pc (CORE_ADDR pc); +/* Return the "MIPS" register size. Just a short cut to the BFD + architecture's word size. */ +extern int mips_regsize (struct gdbarch *gdbarch); + #endif /* MIPS_TDEP_H */ diff --git a/gdb/mipsnbsd-tdep.c b/gdb/mipsnbsd-tdep.c index 62ec8f3bb64..89e62a30c68 100644 --- a/gdb/mipsnbsd-tdep.c +++ b/gdb/mipsnbsd-tdep.c @@ -46,7 +46,7 @@ mipsnbsd_supply_reg (char *regs, int regno) if (CANNOT_FETCH_REGISTER (i)) supply_register (i, NULL); else - supply_register (i, regs + (i * MIPS_REGSIZE)); + supply_register (i, regs + (i * mips_regsize (current_gdbarch))); } } } @@ -58,7 +58,7 @@ mipsnbsd_fill_reg (char *regs, int regno) for (i = 0; i <= PC_REGNUM; i++) if ((regno == i || regno == -1) && ! CANNOT_STORE_REGISTER (i)) - regcache_collect (i, regs + (i * MIPS_REGSIZE)); + regcache_collect (i, regs + (i * mips_regsize (current_gdbarch))); } void @@ -73,7 +73,7 @@ mipsnbsd_supply_fpreg (char *fpregs, int regno) if (CANNOT_FETCH_REGISTER (i)) supply_register (i, NULL); else - supply_register (i, fpregs + ((i - FP0_REGNUM) * MIPS_REGSIZE)); + supply_register (i, fpregs + ((i - FP0_REGNUM) * mips_regsize (current_gdbarch))); } } } @@ -85,7 +85,7 @@ mipsnbsd_fill_fpreg (char *fpregs, int regno) for (i = FP0_REGNUM; i <= FCRCS_REGNUM; i++) if ((regno == i || regno == -1) && ! CANNOT_STORE_REGISTER (i)) - regcache_collect (i, fpregs + ((i - FP0_REGNUM) * MIPS_REGSIZE)); + regcache_collect (i, fpregs + ((i - FP0_REGNUM) * mips_regsize (current_gdbarch))); } static void @@ -232,7 +232,7 @@ mipsnbsd_pc_in_sigtramp (CORE_ADDR pc, char *func_name) success. */ #define NBSD_MIPS_JB_PC (2 * 4) -#define NBSD_MIPS_JB_ELEMENT_SIZE MIPS_REGSIZE +#define NBSD_MIPS_JB_ELEMENT_SIZE mips_regsize (current_gdbarch) #define NBSD_MIPS_JB_OFFSET (NBSD_MIPS_JB_PC * \ NBSD_MIPS_JB_ELEMENT_SIZE) diff --git a/gdb/mipsnbsd-tdep.h b/gdb/mipsnbsd-tdep.h index 6e9f50ed7c2..0feca8784c6 100644 --- a/gdb/mipsnbsd-tdep.h +++ b/gdb/mipsnbsd-tdep.h @@ -27,7 +27,7 @@ void mipsnbsd_fill_reg (char *, int); void mipsnbsd_supply_fpreg (char *, int); void mipsnbsd_fill_fpreg (char *, int); -#define SIZEOF_STRUCT_REG (38 * MIPS_REGSIZE) -#define SIZEOF_STRUCT_FPREG (33 * MIPS_REGSIZE) +#define SIZEOF_STRUCT_REG (38 * mips_regsize (current_gdbarch)) +#define SIZEOF_STRUCT_FPREG (33 * mips_regsize (current_gdbarch)) #endif /* MIPSNBSD_TDEP_H */