From: Luke Kenneth Casson Leighton <lkcl@lkcl.net>
Date: Wed, 3 Jun 2020 14:22:14 +0000 (+0100)
Subject: correct comments on regspec decode map
X-Git-Tag: div_pipeline~630
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=4250c7e26c9056f86da1338add6cdc7f9a57a128;p=soc.git

correct comments on regspec decode map
---

diff --git a/src/soc/decoder/power_regspec_map.py b/src/soc/decoder/power_regspec_map.py
index 1bc486da..241dc94e 100644
--- a/src/soc/decoder/power_regspec_map.py
+++ b/src/soc/decoder/power_regspec_map.py
@@ -19,9 +19,9 @@ def regspec_decode(e, regfile, name):
     name, return a tuple of:
 
     * how the decoder should determine whether the Function Unit needs
-      a Regport or not
-    * which Regfile port should be read to get that data
-    * when it comes to writing: likewise, which Regfile port should be written
+      access to a given Regport or not
+    * which Regfile number on that port should be read to get that data
+    * when it comes to writing: likewise, which Regfile num should be written
 
     Note that some of the port numbering encoding is *unary*.  in the case
     of "Full Condition Register", it's a full 8-bit mask of read/write-enables.