From: Tamar Christina Date: Tue, 8 Aug 2017 13:17:41 +0000 (+0000) Subject: re PR middle-end/19706 (Recognize common Fortran usages of copysign.) X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=4261463d962c29bc105f973a8ab4269cf566cd1b;p=gcc.git re PR middle-end/19706 (Recognize common Fortran usages of copysign.) 2017-08-08 Tamar Christina PR middle-end/19706 * config/aarch64/aarch64.md (xorsign3): New optabs. * config/aarch64/aarch64-builtins.c (aarch64_builtin_vectorized_function): Added CASE_CFN_XORSIGN. * config/aarch64/aarch64-simd-builtins.def: Added xorsign BINOP. * config/aarch64/aarch64-simd.md: Added xorsign3. gcc/testsuite/ 2017-08-08 Tamar Christina * gcc.target/aarch64/xorsign.c: New. * gcc.target/aarch64/xorsign_exec.c: New. * gcc.target/aarch64/vect-xorsign_exec.c: New. From-SVN: r250957 --- diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 5eef8e083be..2f38329ed9e 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,12 @@ +2017-08-08 Tamar Christina + + PR middle-end/19706 + * config/aarch64/aarch64.md (xorsign3): New optabs. + * config/aarch64/aarch64-builtins.c + (aarch64_builtin_vectorized_function): Added CASE_CFN_XORSIGN. + * config/aarch64/aarch64-simd-builtins.def: Added xorsign BINOP. + * config/aarch64/aarch64-simd.md: Added xorsign3 + 2017-08-08 Tamar Christina Andrew Pinski diff --git a/gcc/config/aarch64/aarch64-simd.md b/gcc/config/aarch64/aarch64-simd.md index 74de9b8c89d..f74b68775cf 100644 --- a/gcc/config/aarch64/aarch64-simd.md +++ b/gcc/config/aarch64/aarch64-simd.md @@ -351,6 +351,35 @@ } ) +(define_expand "xorsign3" + [(match_operand:VHSDF 0 "register_operand") + (match_operand:VHSDF 1 "register_operand") + (match_operand:VHSDF 2 "register_operand")] + "TARGET_SIMD" +{ + + machine_mode imode = mode; + rtx v_bitmask = gen_reg_rtx (imode); + rtx op1x = gen_reg_rtx (imode); + rtx op2x = gen_reg_rtx (imode); + + rtx arg1 = lowpart_subreg (imode, operands[1], mode); + rtx arg2 = lowpart_subreg (imode, operands[2], mode); + + int bits = GET_MODE_UNIT_BITSIZE (mode) - 1; + + emit_move_insn (v_bitmask, + aarch64_simd_gen_const_vector_dup (mode, + HOST_WIDE_INT_M1U << bits)); + + emit_insn (gen_and3 (op2x, v_bitmask, arg2)); + emit_insn (gen_xor3 (op1x, arg1, op2x)); + emit_move_insn (operands[0], + lowpart_subreg (mode, op1x, imode)); + DONE; +} +) + (define_expand "copysign3" [(match_operand:VHSDF 0 "register_operand") (match_operand:VHSDF 1 "register_operand") diff --git a/gcc/config/aarch64/aarch64.md b/gcc/config/aarch64/aarch64.md index fc799479c81..7609fdba226 100644 --- a/gcc/config/aarch64/aarch64.md +++ b/gcc/config/aarch64/aarch64.md @@ -5178,6 +5178,42 @@ } ) +;; For xorsign (x, y), we want to generate: +;; +;; LDR d2, #1<<63 +;; AND v3.8B, v1.8B, v2.8B +;; EOR v0.8B, v0.8B, v3.8B +;; + +(define_expand "xorsign3" + [(match_operand:GPF 0 "register_operand") + (match_operand:GPF 1 "register_operand") + (match_operand:GPF 2 "register_operand")] + "TARGET_FLOAT && TARGET_SIMD" +{ + + machine_mode imode = mode; + rtx mask = gen_reg_rtx (imode); + rtx op1x = gen_reg_rtx (imode); + rtx op2x = gen_reg_rtx (imode); + + int bits = GET_MODE_BITSIZE (mode) - 1; + emit_move_insn (mask, GEN_INT (trunc_int_for_mode (HOST_WIDE_INT_M1U << bits, + imode))); + + emit_insn (gen_and3 (op2x, mask, + lowpart_subreg (imode, operands[2], + mode))); + emit_insn (gen_xor3 (op1x, + lowpart_subreg (imode, operands[1], + mode), + op2x)); + emit_move_insn (operands[0], + lowpart_subreg (mode, op1x, imode)); + DONE; +} +) + ;; ------------------------------------------------------------------- ;; Reload support ;; ------------------------------------------------------------------- diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index e2d081d8e26..c9742dfa01d 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,9 @@ +2017-08-08 Tamar Christina + + * gcc.target/aarch64/xorsign.c: New. + * gcc.target/aarch64/xorsign_exec.c: New. + * gcc.target/aarch64/vect-xorsign_exec.c: New. + 2017-08-08 Bill Schmidt PR tree-optimization/81354 diff --git a/gcc/testsuite/gcc.target/aarch64/vect-xorsign_exec.c b/gcc/testsuite/gcc.target/aarch64/vect-xorsign_exec.c new file mode 100644 index 00000000000..d57350c6ab8 --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/vect-xorsign_exec.c @@ -0,0 +1,58 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -ftree-vectorize -fdump-tree-vect-details" } */ + +extern void abort (); + +#define N 16 +float a[N] = {-0.1f, -3.2f, -6.3f, -9.4f, + -12.5f, -15.6f, -18.7f, -21.8f, + 24.9f, 27.1f, 30.2f, 33.3f, + 36.4f, 39.5f, 42.6f, 45.7f}; +float b[N] = {-1.2f, 3.4f, -5.6f, 7.8f, + -9.0f, 1.0f, -2.0f, 3.0f, + -4.0f, -5.0f, 6.0f, 7.0f, + -8.0f, -9.0f, 10.0f, 11.0f}; +float r[N]; + +double ad[N] = {-0.1d, -3.2d, -6.3d, -9.4d, + -12.5d, -15.6d, -18.7d, -21.8d, + 24.9d, 27.1d, 30.2d, 33.3d, + 36.4d, 39.5d, 42.6d, 45.7d}; +double bd[N] = {-1.2d, 3.4d, -5.6d, 7.8d, + -9.0d, 1.0d, -2.0d, 3.0d, + -4.0d, -5.0d, 6.0d, 7.0d, + -8.0d, -9.0d, 10.0d, 11.0d}; +double rd[N]; + +int +main (void) +{ + int i; + + for (i = 0; i < N; i++) + r[i] = a[i] * __builtin_copysignf (1.0f, b[i]); + + /* check results: */ + for (i = 0; i < N; i++) + if (r[i] != a[i] * __builtin_copysignf (1.0f, b[i])) + abort (); + + for (i = 0; i < N; i++) + rd[i] = ad[i] * __builtin_copysign (1.0d, bd[i]); + + /* check results: */ + for (i = 0; i < N; i++) + if (rd[i] != ad[i] * __builtin_copysign (1.0d, bd[i])) + abort (); + + + return 0; +} + +/* { dg-final { scan-tree-dump-times "vectorized 2 loops" 1 "vect" } } */ +/* { dg-final { scan-assembler "\[ \t\]?eor\[ \t\]?" } } */ +/* { dg-final { scan-assembler "\[ \t\]?and\[ \t\]?" } } */ +/* { dg-final { scan-assembler-not "copysign" } } */ +/* { dg-final { scan-assembler-not "\[ \t\]?orr\[ \t\]?" } } */ +/* { dg-final { scan-assembler-not "\[ \t\]?fmul\[ \t\]?" } } */ + diff --git a/gcc/testsuite/gcc.target/aarch64/xorsign.c b/gcc/testsuite/gcc.target/aarch64/xorsign.c new file mode 100644 index 00000000000..22c5829449d --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/xorsign.c @@ -0,0 +1,86 @@ +/* { dg-do compile } */ +/* { dg-options "-O3" } */ + +double +check_d_pos (double x, double y) +{ + return x * __builtin_copysign (1.0, y); +} + +float +check_f_pos (float x, float y) +{ + return x * __builtin_copysignf (1.0f, y); +} + +long double +check_l_pos (long double x, long double y) +{ + return x * __builtin_copysignl (1.0, y); +} + +/* --------------- */ + +double +check_d_neg (double x, double y) +{ + return x * __builtin_copysign (-1.0, y); +} + +float +check_f_neg (float x, float y) +{ + return x * __builtin_copysignf (-1.0f, y); +} + +long double +check_l_neg (long double x, long double y) +{ + return x * __builtin_copysignl (-1.0, y); +} + +/* --------------- */ + +double +check_d_pos_rev (double x, double y) +{ + return __builtin_copysign (1.0, y) * x; +} + +float +check_f_pos_rev (float x, float y) +{ + return __builtin_copysignf (1.0f, y) * x; +} + +long double +check_l_pos_rev (long double x, long double y) +{ + return __builtin_copysignl (1.0, y) * x; +} + +/* --------------- */ + +double +check_d_neg_rev (double x, double y) +{ + return __builtin_copysign (-1.0, y) * x; +} + +float +check_f_neg_rev (float x, float y) +{ + return __builtin_copysignf (-1.0f, y) * x; +} + +long double +check_l_neg_rev (long double x, long double y) +{ + return __builtin_copysignl (-1.0, y) * x; +} + +/* { dg-final { scan-assembler "\[ \t\]?eor\[ \t\]?" } } */ +/* { dg-final { scan-assembler "\[ \t\]?and\[ \t\]?" } } */ +/* { dg-final { scan-assembler-not "copysign" } } */ +/* { dg-final { scan-assembler-not "\[ \t\]?orr\[ \t\]?" } } */ +/* { dg-final { scan-assembler-not "\[ \t\]?fmul\[ \t\]?" } } */ diff --git a/gcc/testsuite/gcc.target/aarch64/xorsign_exec.c b/gcc/testsuite/gcc.target/aarch64/xorsign_exec.c new file mode 100644 index 00000000000..64bf8044cbd --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/xorsign_exec.c @@ -0,0 +1,26 @@ +/* { dg-do run } */ +/* { dg-options "-O -ffast-math" } */ + +#include + +extern void abort(void); + +static double x = 2.0; +static float y = 2.0; + +int main() +{ + if ((2.5 * __builtin_copysign(1.0d, x)) != 2.5) + abort(); + + if ((2.5 * __builtin_copysign(1.0f, y)) != 2.5) + abort(); + + if ((2.5 * __builtin_copysignf(1.0d, -x)) != -2.5) + abort(); + + if ((2.5 * __builtin_copysignf(1.0f, -y)) != -2.5) + abort(); + + return 0; +}