From: H.J. Lu <hjl.tools@gmail.com>
Date: Tue, 14 Apr 2020 13:00:21 +0000 (-0700)
Subject: i386: Remove mode size check in ix86_get_ssemov
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=438ffa2a8fac925b1bee8862fa15bc5380c0dffd;p=gcc.git

i386: Remove mode size check in ix86_get_ssemov

Even though ix86_hard_regno_mode_ok doesn't allow xmm16-xmm31 nor
ymm16-ymm31 in 128/256 bit modes when AVX512VL is disabled, LRA can
still generate reg to reg moves with xmm16-xmm31 and ymm16-ymm31 in
128/256 bit modes.  Remove mode size check in ix86_get_ssemov.

gcc/

	PR target/94561
	* config/i386/i386.c (ix86_get_ssemov): Remove mode size check.

gcc/testsuite/

	PR target/94561
	* gcc.target/i386/pr94561.c: New test.
---

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 726e629188a..343b52c0512 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,8 @@
+2020-04-14  H.J. Lu  <hongjiu.lu@intel.com>
+
+	PR target/94561
+	* config/i386/i386.c (ix86_get_ssemov): Remove mode size check.
+
 2020-04-13  Martin Sebor  <msebor@redhat.com>
 
 	* doc/extend.texi (-Wall): Mention -Wformat-overflow and
diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c
index 5e87cd463d0..1a9823ec844 100644
--- a/gcc/config/i386/i386.c
+++ b/gcc/config/i386/i386.c
@@ -4969,12 +4969,12 @@ ix86_get_ssemov (rtx *operands, unsigned size,
       && !TARGET_AVX512VL
       && GET_MODE_SIZE (mode) < 64)
     {
-      /* NB: Since ix86_hard_regno_mode_ok only allows xmm16-xmm31 or
-	 ymm16-ymm31 in 128/256 bit modes when AVX512VL is enabled,
-	 we get here only for xmm16-xmm31 or ymm16-ymm31 in 32/64 bit
+      /* NB: Even though ix86_hard_regno_mode_ok doesn't allow
+	 xmm16-xmm31 nor ymm16-ymm31 in 128/256 bit modes when
+	 AVX512VL is disabled, LRA can still generate reg to
+	 reg moves with xmm16-xmm31 and ymm16-ymm31 in 128/256 bit
 	 modes.  */
-      if (GET_MODE_SIZE (mode) >= 16
-	  || memory_operand (operands[0], mode)
+      if (memory_operand (operands[0], mode)
 	  || memory_operand (operands[1], mode))
 	gcc_unreachable ();
       size = 64;
diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index f771586d605..e7a82389fc6 100644
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,8 @@
+2020-04-14  H.J. Lu  <hongjiu.lu@intel.com>
+
+	PR target/94561
+	* gcc.target/i386/pr94561.c: New test.
+
 2020-04-14  Tobias Burnus  <tobias@codesourcery.com>
 
 	* gfortran.dg/use_rename_10.f90: New.
diff --git a/gcc/testsuite/gcc.target/i386/pr94561.c b/gcc/testsuite/gcc.target/i386/pr94561.c
new file mode 100644
index 00000000000..49fdf7e687d
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/pr94561.c
@@ -0,0 +1,36 @@
+/* PR target/94561 */
+/* { dg-do compile } */
+/* { dg-options "-march=knl -O3 -funroll-loops" } */
+
+struct xi {
+  long int mg;
+  int lx;
+};
+
+struct xi *di;
+int *eu;
+
+void
+he (void);
+
+int
+m8 (int we, int i8)
+{
+  int wd, cj = 0;
+
+  for (wd = 0; wd < 80; ++wd)
+    {
+      if (di->mg == 0 && (eu[wd] | !!we) == 0 && di->lx == 0)
+        continue;
+
+      if (i8 == 0)
+        he ();
+
+      ++cj;
+    }
+
+  return cj;
+}
+
+/* { dg-final { scan-assembler-not "vmov\[^\n\r]*%\[xy\]mm1\[6-9\].*" } } */
+/* { dg-final { scan-assembler-not "vmov\[^\n\r]*%\[xy\]mm\[23\]\[0-9\].*" } } */