From: Jakub Jelinek <jakub@redhat.com>
Date: Wed, 18 Mar 2015 13:47:47 +0000 (+0100)
Subject: re PR target/65222 (-mtune= or -march=: Not all options not documented: slm, knl... 
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=43939937e8c9585f781534e96539cadefb653115;p=gcc.git

re PR target/65222 (-mtune= or -march=: Not all options not documented: slm, knl, shanghai, istanbul)

	PR target/65222
	* doc/invoke.texi: Add knl as x86 -march=/-mtune= CPU type.

From-SVN: r221489
---

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 2399f1800c2..990aa5842a7 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,8 @@
+2015-03-18  Jakub Jelinek  <jakub@redhat.com>
+
+	PR target/65222
+	* doc/invoke.texi: Add knl as x86 -march=/-mtune= CPU type.
+
 2015-03-18  Richard Biener  <rguenther@suse.de>
 
 	* tree-data-ref.h (struct access_matrix): Remove.
diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi
index 337d9215326..f2ab51744dc 100644
--- a/gcc/doc/invoke.texi
+++ b/gcc/doc/invoke.texi
@@ -21991,6 +21991,12 @@ instruction set support.
 Intel Silvermont CPU with 64-bit extensions, MOVBE, MMX, SSE, SSE2, SSE3, SSSE3,
 SSE4.1, SSE4.2, POPCNT, AES, PCLMUL and RDRND instruction set support.
 
+@item knl
+Intel Knight's Landing CPU with 64-bit extensions, MOVBE, MMX, SSE, SSE2, SSE3,
+SSSE3, SSE4.1, SSE4.2, POPCNT, AVX, AVX2, AES, PCLMUL, FSGSBASE, RDRND, FMA,
+BMI, BMI2, F16C, RDSEED, ADCX, PREFETCHW, AVX512F, AVX512PF, AVX512ER and
+AVX512CD instruction set support.
+
 @item k6
 AMD K6 CPU with MMX instruction set support.