From: Luke Kenneth Casson Leighton <lkcl@lkcl.net>
Date: Wed, 18 Mar 2020 14:38:09 +0000 (+0000)
Subject: add comments linking to 3.0B document
X-Git-Tag: convert-csv-opcode-to-binary~3096
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=43aee84c40c5473ffcedbd86aa069b2eae3ec49d;p=libreriscv.git

add comments linking to 3.0B document
---

diff --git a/openpower/isatables.mdwn b/openpower/isatables.mdwn
index 8b7d75a80..6ae850349 100644
--- a/openpower/isatables.mdwn
+++ b/openpower/isatables.mdwn
@@ -1,8 +1,7 @@
 # ISA Reference Tables
 
-TODO
-
-Based on Anton Blanchard's microwatt decode1.vhdl
+These are from 3.0B p1145 Appendix C, and are
+based on Anton Blanchard's microwatt decode1.vhdl
 
 # Major opcodes
 
@@ -53,7 +52,7 @@ These can match against the (full) row[0] spec: nmigen Case supports "-" as
 
 # SPRs
 
-Special Purpose Registers
+Special Purpose Registers.  These are listed in 3.0B Table 18 p971.
 
 [[!table format=csv file="openpower/isatables/sprs.csv"]]