From: Andrew Cagney Date: Thu, 18 Mar 2004 20:30:08 +0000 (+0000) Subject: 2004-03-18 Andrew Cagney X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=43b1ab882ff7cd3c56458bf6c35031bdb276921c;p=binutils-gdb.git 2004-03-18 Andrew Cagney * rs6000-tdep.c (skip_prologue): Record only the first LR save. --- diff --git a/gdb/ChangeLog b/gdb/ChangeLog index 8fd841b8d72..43ad2f89acc 100644 --- a/gdb/ChangeLog +++ b/gdb/ChangeLog @@ -1,3 +1,7 @@ +2004-03-18 Andrew Cagney + + * rs6000-tdep.c (skip_prologue): Record only the first LR save. + 2004-03-18 Andrew Cagney * config/mips/tm-nbsd.h: Replace IN_SIGTRAMP with diff --git a/gdb/rs6000-tdep.c b/gdb/rs6000-tdep.c index 7c847ef1830..934b5d303b3 100644 --- a/gdb/rs6000-tdep.c +++ b/gdb/rs6000-tdep.c @@ -551,9 +551,26 @@ skip_prologue (CORE_ADDR pc, CORE_ADDR lim_pc, struct rs6000_framedata *fdata) if ((op & 0xfc1fffff) == 0x7c0802a6) { /* mflr Rx */ - lr_reg = (op & 0x03e00000); + /* Since shared library / PIC code, which needs to get its + address at runtime, can appear to save more than one link + register vis: + + *INDENT-OFF* + stwu r1,-304(r1) + mflr r3 + bl 0xff570d0 (blrl) + stw r30,296(r1) + mflr r30 + stw r31,300(r1) + stw r3,308(r1); + ... + *INDENT-ON* + + remember just the first one, but skip over additional + ones. */ + if (lr_reg < 0) + lr_reg = (op & 0x03e00000); continue; - } else if ((op & 0xfc1fffff) == 0x7c000026) { /* mfcr Rx */