From: Rafael Antognolli Date: Wed, 24 Apr 2019 20:05:20 +0000 (-0700) Subject: intel/blorp/gen12: Set FWCC when storing the clear color. X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=43b48ee752eb733c7d3c4e3146c5ba1bdcec42a7;p=mesa.git intel/blorp/gen12: Set FWCC when storing the clear color. From "Render Target Fast Clear" description for Gen12: "SW must store clear color using MI_STORE_DATA_IMM with ForceWriteCompletionCheck bit set." From Instruction_MI_STORE_DATA_IMM, bitfield 10 (when set to 1): "Following the last write from this command, Command Streamer will wait for all previous writes are completed and in global observable domain before moving to next command." We use 4 SDIs to store the clear color (one per channel). From the description, it looks to me that setting that flag only on the last SDI should be enough. Reviewed-by: Kenneth Graunke Reviewed-by: Jordan Justen --- diff --git a/src/intel/blorp/blorp_genX_exec.h b/src/intel/blorp/blorp_genX_exec.h index 379d7a59b64..61db3841801 100644 --- a/src/intel/blorp/blorp_genX_exec.h +++ b/src/intel/blorp/blorp_genX_exec.h @@ -1785,6 +1785,10 @@ blorp_update_clear_color(struct blorp_batch *batch, sdi.Address = info->clear_color_addr; sdi.Address.offset += i * 4; sdi.ImmediateData = info->clear_color.u32[i]; +#if GEN_GEN >= 12 + if (i == 3) + sdi.ForceWriteCompletionCheck = true; +#endif } } #elif GEN_GEN >= 7 diff --git a/src/intel/genxml/gen12.xml b/src/intel/genxml/gen12.xml index 41957adacf9..11f0d926466 100644 --- a/src/intel/genxml/gen12.xml +++ b/src/intel/genxml/gen12.xml @@ -6179,6 +6179,7 @@ +