From: Luke Kenneth Casson Leighton Date: Sun, 1 Jul 2018 23:31:47 +0000 (+0100) Subject: create a val0 which is set to 0 to get round compilation error X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=43d0db0a213c8f86a4f987d22bd622dfc208472f;p=pinmux.git create a val0 which is set to 0 to get round compilation error --- diff --git a/src/bsv/actual_pinmux.py b/src/bsv/actual_pinmux.py index ee90986..58e2040 100644 --- a/src/bsv/actual_pinmux.py +++ b/src/bsv/actual_pinmux.py @@ -69,11 +69,11 @@ def fmt(ifaces, cells, idx, suffix=None): else: cell = '' if not cell: - return '0' + return 'val0' temp = transfn(cell) x = ifaces.getifacetype(temp) if x == 'input': - return '0' # inputs don't get passed through to the out mux + return 'val0' # inputs don't get passed through to the out mux if suffix == '_outen' and x == 'out': return "wr%s%s" % (cells[1], suffix or '') # USE GPIO FOR SELECTION if x == 'out': # sigh hack, should be using interface_decl diff --git a/src/bsv/pinmux_generator.py b/src/bsv/pinmux_generator.py index e086f35..0bbfc19 100644 --- a/src/bsv/pinmux_generator.py +++ b/src/bsv/pinmux_generator.py @@ -191,6 +191,7 @@ def write_pmp(pmp, p, ifaces, iocells): # ========================= Actual pinmuxing ========================# bsv_file.write(''' /*====== This where the muxing starts for each io-cell======*/ + Wire#(Bit#(1)) val0<-mkDWire(0); // need a zero ''') bsv_file.write(p.pinmux) bsv_file.write('''