From: Luke Kenneth Casson Leighton <lkcl@lkcl.net>
Date: Sat, 17 Aug 2019 10:32:15 +0000 (+0100)
Subject: simplify sign/term bits using Cat
X-Git-Tag: ls180-24jan2020~507
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=43de8ed4528ea7627cfe2cbac9374074b22687ae;hp=0c5f99c9fbbe2c95f921f5ff058cbe77c82e7ccc;p=ieee754fpu.git

simplify sign/term bits using Cat
---

diff --git a/src/ieee754/part_mul_add/multiply.py b/src/ieee754/part_mul_add/multiply.py
index 3695f22c..aef8b918 100644
--- a/src/ieee754/part_mul_add/multiply.py
+++ b/src/ieee754/part_mul_add/multiply.py
@@ -608,6 +608,7 @@ class Mul8_16_32_64(Elaboratable):
                 ]:
             byte_width = 8 // len(parts)
             bit_width = 8 * byte_width
+            nat, nbt, nla, nlb = [], [], [], []
             for i in range(len(parts)):
                 be = parts[i] & self.a[(i + 1) * bit_width - 1] \
                     & self._a_signed[i * byte_width]
@@ -621,24 +622,27 @@ class Mul8_16_32_64(Elaboratable):
                 # for 8-bit values: form a * 0xFF00 by using -a * 0x100, the
                 # negation operation is split into a bitwise not and a +1.
                 # likewise for 16, 32, and 64-bit values.
-                m.d.comb += [
-                    not_a_term.bit_select(bit_width * 2 * i, bit_width * 2)
-                    .eq(Mux(a_enabled,
-                            Cat(Repl(0, bit_width),
-                                ~self.a.bit_select(bit_width * i, bit_width)),
-                            0)),
-
-                    neg_lsb_a_term.bit_select(bit_width * 2 * i, bit_width * 2)
-                    .eq(Cat(Repl(0, bit_width), a_enabled)),
-
-                    not_b_term.bit_select(bit_width * 2 * i, bit_width * 2)
-                    .eq(Mux(b_enabled,
-                            Cat(Repl(0, bit_width),
-                                ~self.b.bit_select(bit_width * i, bit_width)),
-                            0)),
-
-                    neg_lsb_b_term.bit_select(bit_width * 2 * i, bit_width * 2)
-                    .eq(Cat(Repl(0, bit_width), b_enabled))]
+                nat.append(Mux(a_enabled,
+                        Cat(Repl(0, bit_width),
+                            ~self.a.bit_select(bit_width * i, bit_width)),
+                        0))
+
+                nla.append(Cat(Repl(0, bit_width), a_enabled,
+                               Repl(0, bit_width-1)))
+
+                nbt.append(Mux(b_enabled,
+                        Cat(Repl(0, bit_width),
+                            ~self.b.bit_select(bit_width * i, bit_width)),
+                        0))
+
+                nlb.append(Cat(Repl(0, bit_width), b_enabled,
+                               Repl(0, bit_width-1)))
+
+            m.d.comb += [not_a_term.eq(Cat(*nat)),
+                         not_b_term.eq(Cat(*nbt)),
+                         neg_lsb_a_term.eq(Cat(*nla)),
+                         neg_lsb_b_term.eq(Cat(*nlb)),
+                        ]
 
         expanded_part_pts = PartitionPoints()
         for i, v in self.part_pts.items():