From: Luke Kenneth Casson Leighton Date: Sun, 5 Apr 2020 11:01:53 +0000 (+0100) Subject: missing bracket from spec X-Git-Tag: convert-csv-opcode-to-binary~2948 X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=44246ae81c3a511d02992fbccff19863056aa6d2;p=libreriscv.git missing bracket from spec --- diff --git a/openpower/isa/branch.mdwn b/openpower/isa/branch.mdwn index 493e442a8..7a1f2f51d 100644 --- a/openpower/isa/branch.mdwn +++ b/openpower/isa/branch.mdwn @@ -49,7 +49,7 @@ XL-Form if (mode_is_64bit) then M <- 0 else M <- 32 if ¬BO[2] then CTR <- CTR - 1 - ctr_ok <- BO[2] | ((CTR[M:63] != 0) ^ BO[3] + ctr_ok <- BO[2] | ((CTR[M:63] != 0) ^ BO[3]) cond_ok <- BO[0] | ¬(CR[BI+32] ^ BO[1]) if ctr_ok & cond_ok then NIA <-iea LR[0:61] || 0b00 if LK then LR <-iea CIA + 4