From: Luke Kenneth Casson Leighton <lkcl@lkcl.net>
Date: Wed, 17 Nov 2021 16:15:37 +0000 (+0000)
Subject: add ability to run hazard instruction for test purposes
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=4442db445044a5e25849f823e62044a5479ccb3d;p=soc.git

add ability to run hazard instruction for test purposes
---

diff --git a/src/soc/simple/test/test_issuer.py b/src/soc/simple/test/test_issuer.py
index 102c397f..1e90784f 100644
--- a/src/soc/simple/test/test_issuer.py
+++ b/src/soc/simple/test/test_issuer.py
@@ -20,6 +20,7 @@ from soc.simple.test.test_runner import TestRunner
 
 # test with ALU data and Logical data
 from openpower.test.alu.alu_cases import ALUTestCase
+from openpower.test.general.overlap_hazards import HazardTestCase
 from openpower.test.div.div_cases import DivTestCases
 from openpower.test.mul.mul_cases import MulTestCases2Arg
 from openpower.test.logical.logical_cases import LogicalTestCase
@@ -47,7 +48,7 @@ if __name__ == "__main__":
     if not testing:
         testing = ['general', 'ldst', 'cr', 'shiftrot', 'shiftrot2',
                    'logical', 'alu',
-                   'branch', 'div', 'mul']
+                   'branch', 'div', 'mul', 'hazard']
 
     print ("SVP64 test mode enabled", svp64, testing)
 
@@ -65,6 +66,7 @@ if __name__ == "__main__":
              'shiftrot': ShiftRotTestCase().test_data,
              'shiftrot2': ShiftRotTestCase2().test_data,
              'logical': LogicalTestCase().test_data,
+             'hazard': HazardTestCase().test_data,
              'alu': ALUTestCase().test_data,
              'branch': BranchTestCase().test_data,
              'spr': SPRTestCase().test_data