From: Jan Beulich <jbeulich@suse.com>
Date: Fri, 2 Dec 2022 08:53:33 +0000 (+0100)
Subject: x86: simplify and slightly correct XCHG vs NOP checking
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=4473201422ad238f90f3151454959a6d35cfb6c2;p=binutils-gdb.git

x86: simplify and slightly correct XCHG vs NOP checking

For one, because of CheckRegSize, there's no need to check the size of
both (register) operands. And then in process_suffix() check opcode
space rather than the (potentially ambiguous) extension opcode.
---

diff --git a/gas/config/tc-i386.c b/gas/config/tc-i386.c
index c58a570123f..3c1e2c91afc 100644
--- a/gas/config/tc-i386.c
+++ b/gas/config/tc-i386.c
@@ -6686,8 +6686,7 @@ match_template (char mnem_suffix)
 	      && t->opcode_modifier.opcodespace == SPACE_BASE
 	      && i.types[0].bitfield.instance == Accum
 	      && i.types[0].bitfield.dword
-	      && i.types[1].bitfield.instance == Accum
-	      && i.types[1].bitfield.dword)
+	      && i.types[1].bitfield.instance == Accum)
 	    continue;
 	  /* xrelease mov %eax, <disp> is another special case. It must not
 	     match the accumulator-only encoding of mov.  */
@@ -7408,11 +7407,10 @@ process_suffix (void)
 	     need rex64. */
 	  && ! (i.operands == 2
 		&& i.tm.base_opcode == 0x90
-		&& i.tm.extension_opcode == None
+		&& i.tm.opcode_modifier.opcodespace == SPACE_BASE
 		&& i.types[0].bitfield.instance == Accum
 		&& i.types[0].bitfield.qword
-		&& i.types[1].bitfield.instance == Accum
-		&& i.types[1].bitfield.qword))
+		&& i.types[1].bitfield.instance == Accum))
 	i.rex |= REX_W;
 
       break;