From: Kenneth Graunke Date: Wed, 6 Apr 2016 03:14:22 +0000 (-0700) Subject: i965: Fix gl_SampleMaskIn[] in per-sample shading mode. X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=447d3eec6a869200612e5010f47335cb26789a3a;p=mesa.git i965: Fix gl_SampleMaskIn[] in per-sample shading mode. The coverage mask is not sufficient - in per-sample mode, we also need to AND with a mask representing the samples being processed by the current fragment shader invocation. Fixes 18 dEQP-GLES31.functional.shaders.sample_variables tests: sample_mask_in.bit_count_per_sample.multisample_{rbo,texture}_{1,2,4,8} sample_mask_in.bit_count_per_two_samples.multisample_{rbo,texture}_{4,8} sample_mask_in.bits_unique_per_sample.multisample_{rbo,texture}_{1,2,4,8} sample_mask_in.bits_unique_per_two_samples.multisample_{rbo,texture}_{4,8} Signed-off-by: Kenneth Graunke Reviewed-by: Matt Turner --- diff --git a/src/mesa/drivers/dri/i965/brw_fs.cpp b/src/mesa/drivers/dri/i965/brw_fs.cpp index e19514721bc..fc72cb36788 100644 --- a/src/mesa/drivers/dri/i965/brw_fs.cpp +++ b/src/mesa/drivers/dri/i965/brw_fs.cpp @@ -1423,6 +1423,46 @@ fs_visitor::emit_sampleid_setup() return reg; } +fs_reg * +fs_visitor::emit_samplemaskin_setup() +{ + assert(stage == MESA_SHADER_FRAGMENT); + brw_wm_prog_key *key = (brw_wm_prog_key *) this->key; + assert(devinfo->gen >= 6); + + fs_reg *reg = new(this->mem_ctx) fs_reg(vgrf(glsl_type::int_type)); + + fs_reg coverage_mask(retype(brw_vec8_grf(payload.sample_mask_in_reg, 0), + BRW_REGISTER_TYPE_D)); + + if (key->persample_shading) { + /* gl_SampleMaskIn[] comes from two sources: the input coverage mask, + * and a mask representing which sample is being processed by the + * current shader invocation. + * + * From the OES_sample_variables specification: + * "When per-sample shading is active due to the use of a fragment input + * qualified by "sample" or due to the use of the gl_SampleID or + * gl_SamplePosition variables, only the bit for the current sample is + * set in gl_SampleMaskIn." + */ + const fs_builder abld = bld.annotate("compute gl_SampleMaskIn"); + + if (nir_system_values[SYSTEM_VALUE_SAMPLE_ID].file == BAD_FILE) + nir_system_values[SYSTEM_VALUE_SAMPLE_ID] = *emit_sampleid_setup(); + + fs_reg one = vgrf(glsl_type::int_type); + fs_reg enabled_mask = vgrf(glsl_type::int_type); + abld.MOV(one, brw_imm_d(1)); + abld.SHL(enabled_mask, one, nir_system_values[SYSTEM_VALUE_SAMPLE_ID]); + abld.AND(*reg, enabled_mask, coverage_mask); + } else { + /* In per-pixel mode, the coverage mask is sufficient. */ + *reg = coverage_mask; + } + return reg; +} + fs_reg fs_visitor::resolve_source_modifiers(const fs_reg &src) { diff --git a/src/mesa/drivers/dri/i965/brw_fs.h b/src/mesa/drivers/dri/i965/brw_fs.h index 6afb9b6c8a6..011fc420d2b 100644 --- a/src/mesa/drivers/dri/i965/brw_fs.h +++ b/src/mesa/drivers/dri/i965/brw_fs.h @@ -189,6 +189,7 @@ public: fs_reg *emit_frontfacing_interpolation(); fs_reg *emit_samplepos_setup(); fs_reg *emit_sampleid_setup(); + fs_reg *emit_samplemaskin_setup(); void emit_general_interpolation(fs_reg *attr, const char *name, const glsl_type *type, glsl_interp_qualifier interpolation_mode, diff --git a/src/mesa/drivers/dri/i965/brw_fs_nir.cpp b/src/mesa/drivers/dri/i965/brw_fs_nir.cpp index d7eccd0df47..492469b75e9 100644 --- a/src/mesa/drivers/dri/i965/brw_fs_nir.cpp +++ b/src/mesa/drivers/dri/i965/brw_fs_nir.cpp @@ -262,8 +262,7 @@ emit_system_values_block(nir_block *block, void *void_visitor) assert(v->devinfo->gen >= 7); reg = &v->nir_system_values[SYSTEM_VALUE_SAMPLE_MASK_IN]; if (reg->file == BAD_FILE) - *reg = fs_reg(retype(brw_vec8_grf(v->payload.sample_mask_in_reg, 0), - BRW_REGISTER_TYPE_D)); + *reg = *v->emit_samplemaskin_setup(); break; case nir_intrinsic_load_local_invocation_id: