From: Kenneth Graunke Date: Wed, 25 Apr 2018 22:25:33 +0000 (-0700) Subject: iris: some depth stuff :( X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=44993d451c9ffd7d056ee9aff1eda9eae47ad0cc;p=mesa.git iris: some depth stuff :( --- diff --git a/src/gallium/drivers/iris/iris_formats.c b/src/gallium/drivers/iris/iris_formats.c index 6939da022b5..8a654408042 100644 --- a/src/gallium/drivers/iris/iris_formats.c +++ b/src/gallium/drivers/iris/iris_formats.c @@ -51,10 +51,11 @@ iris_isl_format_for_pipe_format(enum pipe_format pf) [PIPE_FORMAT_Z16_UNORM] = ISL_FORMAT_R16_UNORM, [PIPE_FORMAT_Z32_UNORM] = ISL_FORMAT_R32_UNORM, [PIPE_FORMAT_Z32_FLOAT] = ISL_FORMAT_R32_FLOAT, - //[PIPE_FORMAT_Z24_UNORM_S8_UINT] = ISL_FORMAT_R24_UNORM_S8_UINT, + /* XXX: separate stencil */ + [PIPE_FORMAT_Z24_UNORM_S8_UINT] = ISL_FORMAT_R24_UNORM_X8_TYPELESS, //[PIPE_FORMAT_S8_UINT_Z24_UNORM] = ISL_FORMAT_S8_UINT_Z24_UNORM, - [PIPE_FORMAT_Z24X8_UNORM] = ISL_FORMAT_R24_UNORM_X8_TYPELESS, - //[PIPE_FORMAT_X8Z24_UNORM] = ISL_FORMAT_R24_UNORM_X8_TYPELESS, + //[PIPE_FORMAT_Z24X8_UNORM] = ISL_FORMAT_R24_UNORM_X8_TYPELESS, + [PIPE_FORMAT_X8Z24_UNORM] = ISL_FORMAT_R24_UNORM_X8_TYPELESS, [PIPE_FORMAT_S8_UINT] = ISL_FORMAT_R8_UINT, [PIPE_FORMAT_R64_FLOAT] = ISL_FORMAT_R64_FLOAT, [PIPE_FORMAT_R64G64_FLOAT] = ISL_FORMAT_R64G64_FLOAT, diff --git a/src/gallium/drivers/iris/iris_resource.c b/src/gallium/drivers/iris/iris_resource.c index 172ebbcaeb8..e3a10c73743 100644 --- a/src/gallium/drivers/iris/iris_resource.c +++ b/src/gallium/drivers/iris/iris_resource.c @@ -38,6 +38,8 @@ #include "drm-uapi/drm_fourcc.h" #include "drm-uapi/i915_drm.h" +// XXX: u_transfer_helper...for separate stencil... + enum modifier_priority { MODIFIER_PRIORITY_INVALID = 0, MODIFIER_PRIORITY_LINEAR, @@ -131,48 +133,18 @@ pipe_bind_to_isl_usage(unsigned bindings) { isl_surf_usage_flags_t usage = 0; - if (bindings & PIPE_BIND_DEPTH_STENCIL) - usage |= ISL_SURF_USAGE_DEPTH_BIT | ISL_SURF_USAGE_STENCIL_BIT; - if (bindings & PIPE_BIND_RENDER_TARGET) usage |= ISL_SURF_USAGE_RENDER_TARGET_BIT; - if (bindings & PIPE_BIND_SHADER_IMAGE) + if (bindings & PIPE_BIND_SAMPLER_VIEW) + usage |= ISL_SURF_USAGE_TEXTURE_BIT; + + if (bindings & (PIPE_BIND_SHADER_IMAGE | PIPE_BIND_SHADER_BUFFER)) usage |= ISL_SURF_USAGE_STORAGE_BIT; if (bindings & PIPE_BIND_DISPLAY_TARGET) usage |= ISL_SURF_USAGE_DISPLAY_BIT; - /* XXX: what to do with these? */ - if (bindings & PIPE_BIND_BLENDABLE) - ; - if (bindings & PIPE_BIND_SAMPLER_VIEW) - ; - if (bindings & PIPE_BIND_VERTEX_BUFFER) - ; - if (bindings & PIPE_BIND_INDEX_BUFFER) - ; - if (bindings & PIPE_BIND_CONSTANT_BUFFER) - ; - - if (bindings & PIPE_BIND_STREAM_OUTPUT) - ; - if (bindings & PIPE_BIND_CURSOR) - ; - if (bindings & PIPE_BIND_CUSTOM) - ; - - if (bindings & PIPE_BIND_GLOBAL) - ; - if (bindings & PIPE_BIND_SHADER_BUFFER) - ; - if (bindings & PIPE_BIND_COMPUTE_RESOURCE) - ; - if (bindings & PIPE_BIND_COMMAND_ARGS_BUFFER) - ; - if (bindings & PIPE_BIND_QUERY_BUFFER) - ; - return usage; } @@ -212,12 +184,19 @@ iris_resource_create_with_modifiers(struct pipe_screen *pscreen, if (!res) return NULL; + bool depth = util_format_is_depth_or_stencil(templ->format); + uint64_t modifier = DRM_FORMAT_MOD_INVALID; - if (modifiers_count == 0) { - /* Display is X-tiled for historical reasons. */ - modifier = (templ->bind & PIPE_BIND_DISPLAY_TARGET) ? - I915_FORMAT_MOD_X_TILED : I915_FORMAT_MOD_Y_TILED; + if (modifiers_count == 0 || !modifiers) { + if (depth) { + modifier = I915_FORMAT_MOD_Y_TILED; + } else if (templ->bind & PIPE_BIND_DISPLAY_TARGET) { + /* Display is X-tiled for historical reasons. */ + modifier = I915_FORMAT_MOD_X_TILED; + } else { + modifier = I915_FORMAT_MOD_Y_TILED; + } /* XXX: make sure this doesn't do stupid things for internal textures */ } @@ -242,10 +221,25 @@ iris_resource_create_with_modifiers(struct pipe_screen *pscreen, if (templ->target == PIPE_TEXTURE_CUBE) usage |= ISL_SURF_USAGE_CUBE_BIT; + // XXX: separate stencil... + enum pipe_format pfmt = templ->format; + + if (util_format_is_depth_or_stencil(pfmt) && + templ->usage != PIPE_USAGE_STAGING) + usage |= ISL_SURF_USAGE_DEPTH_BIT; + + if (util_format_is_depth_and_stencil(pfmt)) { + // XXX: Z32S8 + pfmt = PIPE_FORMAT_X8Z24_UNORM; + } + + enum isl_format isl_format = iris_isl_format_for_pipe_format(pfmt); + assert(isl_format != ISL_FORMAT_UNSUPPORTED); + UNUSED const bool isl_surf_created_successfully = isl_surf_init(&screen->isl_dev, &res->surf, .dim = target_to_isl_surf_dim(templ->target), - .format = iris_isl_format_for_pipe_format(templ->format), + .format = isl_format, .width = templ->width0, .height = templ->height0, .depth = templ->depth0, diff --git a/src/gallium/drivers/iris/iris_state.c b/src/gallium/drivers/iris/iris_state.c index 04197ef2e52..c1616606b4e 100644 --- a/src/gallium/drivers/iris/iris_state.c +++ b/src/gallium/drivers/iris/iris_state.c @@ -37,6 +37,7 @@ #include "pipe/p_context.h" #include "pipe/p_screen.h" #include "util/u_inlines.h" +#include "util/u_format.h" #include "util/u_transfer.h" #include "util/u_upload_mgr.h" #include "i915_drm.h" @@ -980,7 +981,7 @@ iris_create_surface(struct pipe_context *ctx, struct iris_screen *screen = (struct iris_screen *)ctx->screen; struct iris_surface *surf = calloc(1, sizeof(struct iris_surface)); struct pipe_surface *psurf = &surf->pipe; - struct iris_resource *itex = (struct iris_resource *) tex; + struct iris_resource *res = (struct iris_resource *) tex; if (!surf) return NULL; @@ -996,6 +997,14 @@ iris_create_surface(struct pipe_context *ctx, psurf->u.tex.last_layer = tmpl->u.tex.last_layer; psurf->u.tex.level = tmpl->u.tex.level; + unsigned usage = 0; + if (tmpl->writable) + usage = ISL_SURF_USAGE_STORAGE_BIT; + else if (util_format_is_depth_or_stencil(tmpl->format)) + usage = ISL_SURF_USAGE_DEPTH_BIT; + else + usage = ISL_SURF_USAGE_RENDER_TARGET_BIT; + surf->view = (struct isl_view) { .format = iris_isl_format_for_pipe_format(tmpl->format), .base_level = tmpl->u.tex.level, @@ -1003,10 +1012,14 @@ iris_create_surface(struct pipe_context *ctx, .base_array_layer = tmpl->u.tex.first_layer, .array_len = tmpl->u.tex.last_layer - tmpl->u.tex.first_layer + 1, .swizzle = ISL_SWIZZLE_IDENTITY, - // XXX: DEPTH_BIt, STENCIL_BIT...CUBE_BIT? Other bits?! - .usage = ISL_SURF_USAGE_RENDER_TARGET_BIT, + .usage = usage, }; + /* Bail early for depth/stencil */ + if (res->surf.usage & (ISL_SURF_USAGE_DEPTH_BIT | + ISL_SURF_USAGE_STENCIL_BIT)) + return psurf; + void *map = NULL; u_upload_alloc(ice->state.surface_uploader, 0, 4 * GENX(RENDER_SURFACE_STATE_length), 64, @@ -1020,9 +1033,9 @@ iris_create_surface(struct pipe_context *ctx, surf->surface_state_offset += iris_bo_offset_from_base_address(state_bo); isl_surf_fill_state(&screen->isl_dev, map, - .surf = &itex->surf, .view = &surf->view, + .surf = &res->surf, .view = &surf->view, .mocs = MOCS_WB, - .address = itex->bo->gtt_offset); + .address = res->bo->gtt_offset); // .aux_surf = // .clear_color = clear_color,