From: Eddie Hung <eddie@fpgeh.com>
Date: Fri, 30 Aug 2019 22:01:38 +0000 (-0700)
Subject: Update commented out
X-Git-Tag: working-ls180~1039^2~221
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=44a35015b308adbbf5f87408d2928a36245f57e7;p=yosys.git

Update commented out
---

diff --git a/passes/pmgen/xilinx_dsp.cc b/passes/pmgen/xilinx_dsp.cc
index 105ad1fa1..b03fff8ec 100644
--- a/passes/pmgen/xilinx_dsp.cc
+++ b/passes/pmgen/xilinx_dsp.cc
@@ -104,7 +104,7 @@ void pack_xilinx_dsp(dict<SigBit, Cell*> &bit_to_driver, xilinx_dsp_pm &pm)
 			if (st.ffP->type == "$dff")
 				cell->setPort("\\CEM", State::S1);
 			//else if (st.ffP->type == "$dffe")
-			//	cell->setPort("\\CEP", st.ffP->getPort("\\EN"));
+			//	cell->setPort("\\CEM", st.ffM->getPort("\\EN"));
 			else log_abort();
 		}
 		if (st.ffP) {