From: Ben Elliston <bje@au.ibm.com>
Date: Wed, 21 Feb 2001 21:35:41 +0000 (+0000)
Subject: 2001-02-21  Ben Elliston  <bje@redhat.com>
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=44a9331cdff9b223ac5683963bb8346b7a6bbde9;p=binutils-gdb.git

2001-02-21  Ben Elliston  <bje@redhat.com>

	* sim-trace.h (TRACE_BRANCH_INPUT1): New macro.
	(TRACE_BRANCH_INPUT2): Likewise.
---

diff --git a/sim/common/ChangeLog b/sim/common/ChangeLog
index 35830a9e5a8..18226044548 100644
--- a/sim/common/ChangeLog
+++ b/sim/common/ChangeLog
@@ -1,3 +1,8 @@
+2001-02-21  Ben Elliston  <bje@redhat.com>
+
+	* sim-trace.h (TRACE_BRANCH_INPUT1): New macro.
+	(TRACE_BRANCH_INPUT2): Likewise.
+
 2001-02-09  Ben Elliston  <bje@redhat.com>
 
 	* (profile_print_pc): Write header out in target byte order.
diff --git a/sim/common/sim-trace.h b/sim/common/sim-trace.h
index d34f5c4fd90..167e71007ef 100644
--- a/sim/common/sim-trace.h
+++ b/sim/common/sim-trace.h
@@ -383,7 +383,7 @@ extern void trace_result_word1_string1 PARAMS ((SIM_DESC sd,
 /* Other trace_result{_<type><nr-results>} */
 
 
-/* Macro's for tracing ALU instructions */
+/* Macros for tracing ALU instructions */
 
 #define TRACE_ALU_INPUT0() \
 do { \
@@ -441,8 +441,21 @@ do { \
     trace_result_word4 (SD, CPU, TRACE_ALU_IDX, (R0), (R1), (R2), (R3)); \
 } while (0)
 
+/* Macros for tracing inputs to comparative branch instructions. */
 
-/* Macro's for tracing FPU instructions */
+#define TRACE_BRANCH_INPUT1(V0) \
+do { \
+  if (TRACE_BRANCH_P (CPU)) \
+    trace_input_word1 (SD, CPU, TRACE_BRANCH_IDX, (V0)); \
+} while (0)
+
+#define TRACE_BRANCH_INPUT2(V0,V1) \
+do { \
+  if (TRACE_BRANCH_P (CPU)) \
+    trace_input_word2 (SD, CPU, TRACE_BRANCH_IDX, (V0), (V1)); \
+} while (0)
+
+/* Macros for tracing FPU instructions */
 
 #define TRACE_FP_INPUT0() \
 do { \