From: lkcl <lkcl@web>
Date: Sun, 3 May 2020 13:21:01 +0000 (+0100)
Subject: (no commit message)
X-Git-Tag: convert-csv-opcode-to-binary~2768
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=44af76221464559cd2d51a22cfb0dda7cc01d670;p=libreriscv.git

---

diff --git a/3d_gpu/architecture/regfile.mdwn b/3d_gpu/architecture/regfile.mdwn
index cd735fc3b..983e8c448 100644
--- a/3d_gpu/architecture/regfile.mdwn
+++ b/3d_gpu/architecture/regfile.mdwn
@@ -11,4 +11,4 @@ The FP and Integer registers need to be a massive 128 x 64-bit.
 
 # Connectivity between regfiles and Function Units
 
-[[!img regfile_hilo_32_odd_even.reg]]
+[[!img regfile_hilo_32_odd_even.png]]