From: Marek Olšák Date: Fri, 6 Dec 2019 00:37:59 +0000 (-0500) Subject: radeonsi: disallow compute-based culling if polygon mode is enabled X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=451bc911583b691a677da4b1bd0c60ca3ed9e54a;p=mesa.git radeonsi: disallow compute-based culling if polygon mode is enabled Polygon mode can generate thick points or lines. Reviewed-by: Pierre-Eric Pelloux-Prayer Part-of: --- diff --git a/src/gallium/drivers/radeonsi/si_state.c b/src/gallium/drivers/radeonsi/si_state.c index ac3d14d8f66..b8a2d350488 100644 --- a/src/gallium/drivers/radeonsi/si_state.c +++ b/src/gallium/drivers/radeonsi/si_state.c @@ -919,6 +919,8 @@ static void *si_create_rs_state(struct pipe_context *ctx, rs->flatshade_first = state->flatshade_first; rs->sprite_coord_enable = state->sprite_coord_enable; rs->rasterizer_discard = state->rasterizer_discard; + rs->polygon_mode_enabled = state->fill_front != PIPE_POLYGON_MODE_FILL || + state->fill_back != PIPE_POLYGON_MODE_FILL; rs->pa_sc_line_stipple = state->line_stipple_enable ? S_028A0C_LINE_PATTERN(state->line_stipple_pattern) | S_028A0C_REPEAT_COUNT(state->line_stipple_factor) : 0; @@ -976,8 +978,7 @@ static void *si_create_rs_state(struct pipe_context *ctx, S_028814_POLY_OFFSET_FRONT_ENABLE(util_get_offset(state, state->fill_front)) | S_028814_POLY_OFFSET_BACK_ENABLE(util_get_offset(state, state->fill_back)) | S_028814_POLY_OFFSET_PARA_ENABLE(state->offset_point || state->offset_line) | - S_028814_POLY_MODE(state->fill_front != PIPE_POLYGON_MODE_FILL || - state->fill_back != PIPE_POLYGON_MODE_FILL) | + S_028814_POLY_MODE(rs->polygon_mode_enabled) | S_028814_POLYMODE_FRONT_PTYPE(si_translate_fill(state->fill_front)) | S_028814_POLYMODE_BACK_PTYPE(si_translate_fill(state->fill_back))); diff --git a/src/gallium/drivers/radeonsi/si_state.h b/src/gallium/drivers/radeonsi/si_state.h index 3a16e55e70a..d334a5196d1 100644 --- a/src/gallium/drivers/radeonsi/si_state.h +++ b/src/gallium/drivers/radeonsi/si_state.h @@ -94,6 +94,7 @@ struct si_state_rasterizer { unsigned cull_back:1; unsigned depth_clamp_any:1; unsigned provoking_vertex_first:1; + unsigned polygon_mode_enabled:1; }; struct si_dsa_stencil_ref_part { diff --git a/src/gallium/drivers/radeonsi/si_state_draw.c b/src/gallium/drivers/radeonsi/si_state_draw.c index aa974d85811..101d8d27420 100644 --- a/src/gallium/drivers/radeonsi/si_state_draw.c +++ b/src/gallium/drivers/radeonsi/si_state_draw.c @@ -1993,6 +1993,7 @@ static void si_draw_vbo(struct pipe_context *ctx, const struct pipe_draw_info *i (!sctx->tes_shader.cso || pd_msg("uses tess")) && (!sctx->gs_shader.cso || pd_msg("uses GS")) && (!sctx->ps_shader.cso->info.uses_primid || pd_msg("PS uses PrimID")) && + !rs->polygon_mode_enabled && #if SI_PRIM_DISCARD_DEBUG /* same as cso->prim_discard_cs_allowed */ (!sctx->vs_shader.cso->info.uses_bindless_images || pd_msg("uses bindless images")) && (!sctx->vs_shader.cso->info.uses_bindless_samplers || pd_msg("uses bindless samplers")) &&