From: Luke Kenneth Casson Leighton <lkcl@lkcl.net>
Date: Sun, 7 Jun 2020 20:15:58 +0000 (+0100)
Subject: resolved CR mfcr lookup bug (was in power_decoder. ??)
X-Git-Tag: div_pipeline~487
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=452634417d8d4157d05cf3d323ab7341e50b45fa;p=soc.git

resolved CR mfcr lookup bug (was in power_decoder. ??)
https://bugs.libre-soc.org/show_bug.cgi?id=363
---

diff --git a/src/soc/decoder/power_decoder2.py b/src/soc/decoder/power_decoder2.py
index 1dc9b37f..64ad3913 100644
--- a/src/soc/decoder/power_decoder2.py
+++ b/src/soc/decoder/power_decoder2.py
@@ -445,7 +445,7 @@ class DecodeCROut(Elaboratable):
                 comb += self.cr_bitfield.data.eq(0)
                 comb += self.cr_bitfield.ok.eq(self.rc_in) # only when RC=1
             with m.Case(CROutSel.BF):
-                comb += self.cr_bitfield.data.eq(self.dec.FormX.BF[0:-1])
+                comb += self.cr_bitfield.data.eq(self.dec.FormX.BF)
                 comb += self.cr_bitfield.ok.eq(1)
             with m.Case(CROutSel.BT):
                 comb += self.cr_bitfield.data.eq(self.dec.FormXL.BT[2:5])