From: Neel <neelgala@gmail.com>
Date: Sat, 21 Jul 2018 12:51:27 +0000 (+0530)
Subject: add in quart
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=4547ec9c0795c5badeea607ca0dfe8bf083cbb29;p=pinmux.git

add in quart
---

diff --git a/src/bsv/peripheral_gen.py b/src/bsv/peripheral_gen.py
index ff74a04..5326144 100644
--- a/src/bsv/peripheral_gen.py
+++ b/src/bsv/peripheral_gen.py
@@ -187,31 +187,51 @@ class uart(PBase):
         return {'rx': 'coe_rs232.sin'}.get(pname, '')
 
 
-class qquart(PBase):
+class quart(PBase):
 
     def slowimport(self):
         return "          import Uart16550         :: *;"
 
     def slowifdecl(self):
-        return "            interface RS232_PHY_Ifc uart{0}_coe;\n" + \
-               "            method Bit#(1) uart{0}_intr;"
+        return "            interface RS232_PHY_Ifc quart{0}_coe;\n" + \
+               "            method Bit#(1) quart{0}_intr;"
 
     def num_axi_regs32(self):
         return 8
 
     def mkslow_peripheral(self, size=0):
-        return "        Uart16550_AXI4_Lite_Ifc uart{0} <- \n" + \
+        return "        Uart16550_AXI4_Lite_Ifc quart{0} <- \n" + \
                "                mkUart16550(clocked_by sp_clock,\n" + \
                "                    reset_by uart_reset, sp_clock, sp_reset);"
 
     def _mk_connection(self, name=None, count=0):
-        return "uart{0}.slave_axi_uart"
+        return "quart{0}.slave_axi_uart"
 
     def pinname_out(self, pname):
-        return {'tx': 'coe_rs232.sout'}.get(pname, '')
+        return {'tx' : 'coe_rs232.modem_output_stx',
+                'rts': 'coe_rs232.modem_output_rts',
+               }.get(pname, '')
 
-    def pinname_in(self, pname):
-        return {'rx': 'coe_rs232.sin'}.get(pname, '')
+    def _pinname_in(self, pname):
+        return {'rx': 'coe_rs232.modem_input.srx', 
+                'cts': 'coe_rs232.modem_input.cts'
+               }.get(pname, '')
+
+    def mk_pincon(self, name, count):
+        ret = [PBase.mk_pincon(self, name, count)]
+        size = len(self.peripheral.pinspecs)
+        ret.append(eint_pincon_template.format(size))
+        ret.append("    rule con_%s%d_io_in;" % (name, count))
+        ret.append("       {0}{1}.coe_rs232.modem_input(".format(name, count))
+        for idx, pname in enumerate(['rx', 'cts']):
+            sname = self.peripheral.pname(pname).format(count)
+            ps = "pinmux.peripheral_side.%s" % sname
+            ret.append("            {0},".format(ps))
+        ret.append("            1'b1,1'b0,1'b1")
+        ret.append("        );")
+        ret.append("    endrule")
+
+        return '\n'.join(ret)
 
 
 class rs232(PBase):
@@ -801,6 +821,7 @@ class PFactory(object):
         for k, v in {'uart': uart,
                      'rs232': rs232,
                      'twi': twi,
+                     'quart': quart,
                      'qspi': qspi,
                      'spi': spi,
                      'pwm': pwm,