From: Luke Kenneth Casson Leighton <lkcl@lkcl.net>
Date: Thu, 2 Aug 2018 10:21:15 +0000 (+0100)
Subject: try different clock for sdr
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=45903051fb3ef1adb200e4f866ba3b5069d8127e;p=pinmux.git

try different clock for sdr
---

diff --git a/src/bsv/peripheral_gen/sdram.py b/src/bsv/peripheral_gen/sdram.py
index ce6ba43..308da1b 100644
--- a/src/bsv/peripheral_gen/sdram.py
+++ b/src/bsv/peripheral_gen/sdram.py
@@ -19,10 +19,10 @@ class sdram(PBase):
                 "Ifc_sdram_out sdr{0}_out;".format(count)
 
     def get_clk_spc(self, typ):
-        return "clk0, slow_reset"
+        return "core_clock, core_reset"
 
     def get_clock_reset(self, name, count):
-        return "slow_clock, slow_reset"
+        return "clk0, core_reset"
 
     def mkfast_peripheral(self):
         return "Ifc_sdr_slave sdr{0} <- mksdr_axi4_slave(clk0);"