From: Jim Wilson <wilson@cygnus.com>
Date: Thu, 11 Jun 1998 12:54:24 +0000 (+0000)
Subject: Fix mips build error.
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=45cc4c096a0d1da684cfe654cd94c61cd0b10d00;p=gcc.git

Fix mips build error.

	* mips.c (override_options): Replace word_mode with explicit
	TARGET_64BIT check.

From-SVN: r20428
---

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 79f0a7e8bbf..de843accde8 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,8 @@
+Thu Jun 11 12:40:27 1998  Jim Wilson  <wilson@cygnus.com>
+
+	* mips.c (override_options): Replace word_mode with explicit
+	TARGET_64BIT check.
+
 Thu Jun 11 14:50:02 1998  Michael Meissner  <meissner@cygnus.com>
 
 	* regmove.c (regmove_optimize): If we can't replace the
diff --git a/gcc/config/mips/mips.c b/gcc/config/mips/mips.c
index f5faa94ac2f..cd7ba947880 100644
--- a/gcc/config/mips/mips.c
+++ b/gcc/config/mips/mips.c
@@ -4451,8 +4451,9 @@ override_options ()
 	}
     }
 
-  /* Save GPR registers in word_mode sized hunks.  */
-  gpr_mode = word_mode;
+  /* Save GPR registers in word_mode sized hunks.  word_mode hasn't been
+     initialized yet, so we can't use that here.  */
+  gpr_mode = TARGET_64BIT ? DImode : SImode;
 }
 
 /* On the mips16, we want to allocate $24 (T_REG) before other