From: George Kyriazis <george.kyriazis@intel.com>
Date: Fri, 9 Feb 2018 20:04:14 +0000 (-0600)
Subject: swr/rast: Add semantics for translating address
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=45df1a65200fafc293129a7473a0a6ffef92017c;p=mesa.git

swr/rast: Add semantics for translating address

Added support for another full translation path in fetch jitter.

Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>
---

diff --git a/src/gallium/drivers/swr/rasterizer/jitter/builder_mem.h b/src/gallium/drivers/swr/rasterizer/jitter/builder_mem.h
index 4e78098022f..4f496343e96 100644
--- a/src/gallium/drivers/swr/rasterizer/jitter/builder_mem.h
+++ b/src/gallium/drivers/swr/rasterizer/jitter/builder_mem.h
@@ -75,3 +75,4 @@ Value* pScatterStackSrc{ nullptr };
 Value* pScatterStackOffsets{ nullptr };
 
 
+virtual Value* TRANSLATE_ADDRESS(Value* address) { return address; }
diff --git a/src/gallium/drivers/swr/rasterizer/jitter/fetch_jit.cpp b/src/gallium/drivers/swr/rasterizer/jitter/fetch_jit.cpp
index aa2d4c36571..880aaf8d543 100644
--- a/src/gallium/drivers/swr/rasterizer/jitter/fetch_jit.cpp
+++ b/src/gallium/drivers/swr/rasterizer/jitter/fetch_jit.cpp
@@ -1830,12 +1830,16 @@ Value* FetchJit::GetSimdValid16bitIndices(Value* pIndices, Value* pLastIndex)
     Value* pZeroIndex = ALLOCA(mInt16Ty);
     STORE(C((uint16_t)0), pZeroIndex);
 
+    pLastIndex = TRANSLATE_ADDRESS(pLastIndex);
+
     // Load a SIMD of index pointers
     for(int64_t lane = 0; lane < mVWidth; lane++)
     {
         // Calculate the address of the requested index
         Value *pIndex = GEP(pIndices, C(lane));
 
+        pIndex = TRANSLATE_ADDRESS(pIndex);
+
         // check if the address is less than the max index, 
         Value* mask = ICMP_ULT(pIndex, pLastIndex);