From: Luke Kenneth Casson Leighton <lkcl@lkcl.net>
Date: Wed, 16 Jun 2021 16:20:51 +0000 (+0100)
Subject: reorder arguments to FPMULADD32 to match pseudocode
X-Git-Tag: xlen-bcd~444
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=46852e76835542d3a4699159b0e56f983edf6eeb;p=openpower-isa.git

reorder arguments to FPMULADD32 to match pseudocode
---

diff --git a/src/openpower/decoder/helpers.py b/src/openpower/decoder/helpers.py
index 7188f6cc..8b849fb8 100644
--- a/src/openpower/decoder/helpers.py
+++ b/src/openpower/decoder/helpers.py
@@ -289,21 +289,21 @@ def FPMUL32(FRA, FRB):
     return cvt
 
 
-def FPMULADD32(FRA, FRB, FRC, addsign, mulsign):
+def FPMULADD32(FRA, FRC, FRB, addsign, mulsign):
     from openpower.decoder.isafunctions.double2single import DOUBLE2SINGLE
     #return FPMUL64(FRA, FRB)
     #FRA = DOUBLE(SINGLE(FRA))
     #FRB = DOUBLE(SINGLE(FRB))
     if addsign == 1:
-        result = float(FRC)
+        result = float(FRB)
     elif addsign == -1:
-        result = -float(FRC)
+        result = -float(FRB)
     elif addsign == 0:
         result = 0.0
     if mulsign == 1:
-        result += float(FRA) * float(FRB)
+        result += float(FRA) * float(FRC)
     elif mulsign == -1:
-        result -= float(FRA) * float(FRB)
+        result -= float(FRA) * float(FRC)
     log ("FPMULADD32", FRA, FRB, FRC,
                        float(FRA), float(FRB), float(FRC),
                        result)