From: Andreas Sandberg Date: Wed, 9 Jan 2019 15:52:51 +0000 (+0000) Subject: arch-arm, sim-se: Fix incorrect SP handling in clone X-Git-Tag: v19.0.0.0~1282 X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=46d6137f01d7321172f00f4ae3f697018739396d;p=gem5.git arch-arm, sim-se: Fix incorrect SP handling in clone The clone syscall is currently broken on aarch64 since the aarch64 code uses an incorrect SP register. Fix this by storing the new stack pointer in SP_EL0 instead of R13. Change-Id: Ie17990b4f359608e3b53e5bf625eca53769a6653 Signed-off-by: Andreas Sandberg Cc: Giacomo Travaglini Cc: Javier Setoain Cc: Brandon Potter Reviewed-on: https://gem5-review.googlesource.com/c/15436 Reviewed-by: Jason Lowe-Power Maintainer: Brandon Potter --- diff --git a/src/arch/arm/linux/linux.hh b/src/arch/arm/linux/linux.hh index 9e9ca1f80..e1f27a761 100644 --- a/src/arch/arm/linux/linux.hh +++ b/src/arch/arm/linux/linux.hh @@ -58,9 +58,6 @@ class ArmLinux : public Linux uint64_t stack, uint64_t tls) { ArmISA::copyRegs(ptc, ctc); - - if (stack) - ctc->setIntReg(TheISA::StackPointerReg, stack); } }; @@ -271,6 +268,18 @@ class ArmLinux32 : public ArmLinux int32_t tms_cutime; //!< user time of children int32_t tms_cstime; //!< system time of children }; + + static void + archClone(uint64_t flags, + Process *pp, Process *cp, + ThreadContext *ptc, ThreadContext *ctc, + uint64_t stack, uint64_t tls) + { + ArmLinux::archClone(flags, pp, cp, ptc, ctc, stack, tls); + + if (stack) + ctc->setIntReg(ArmISA::INTREG_SP, stack); + } }; class ArmLinux64 : public ArmLinux @@ -516,6 +525,17 @@ class ArmLinux64 : public ArmLinux int64_t tms_cutime; //!< user time of children int64_t tms_cstime; //!< system time of children }; + + static void archClone(uint64_t flags, + Process *pp, Process *cp, + ThreadContext *ptc, ThreadContext *ctc, + uint64_t stack, uint64_t tls) + { + ArmLinux::archClone(flags, pp, cp, ptc, ctc, stack, tls); + + if (stack) + ctc->setIntReg(ArmISA::INTREG_SP0, stack); + } }; #endif