From: Luke Kenneth Casson Leighton Date: Mon, 2 Jul 2018 09:56:01 +0000 (+0100) Subject: pep8 cleanup X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=47236c8f19b6fd3b4b722c438598577a05de9b2b;p=pinmux.git pep8 cleanup --- diff --git a/src/bsv/actual_pinmux.py b/src/bsv/actual_pinmux.py index 58e2040..223d1f8 100644 --- a/src/bsv/actual_pinmux.py +++ b/src/bsv/actual_pinmux.py @@ -75,8 +75,8 @@ def fmt(ifaces, cells, idx, suffix=None): if x == 'input': return 'val0' # inputs don't get passed through to the out mux if suffix == '_outen' and x == 'out': - return "wr%s%s" % (cells[1], suffix or '') # USE GPIO FOR SELECTION - if x == 'out': # sigh hack, should be using interface_decl + return "wr%s%s" % (cells[1], suffix or '') # USE GPIO FOR SELECTION + if x == 'out': # sigh hack, should be using interface_decl suffix = '' return "wr%s%s" % (cell, suffix or '') diff --git a/src/spec/ifaceprint.py b/src/spec/ifaceprint.py index d0e9e24..e15d102 100644 --- a/src/spec/ifaceprint.py +++ b/src/spec/ifaceprint.py @@ -167,8 +167,8 @@ def check_functions(of, title, bankspec, fns, pins, required, eint, pwm, of.write("* %s %d %s%d/%d\n" % (fname, pin_, bank, pin, mux)) if removedcount != count: - print ("not all found", name, removedcount, count, title, found, \ - fns[fname]) + print ("not all found", name, removedcount, count, title, found, + fns[fname]) print ("pins found", pinfound) # fnidx.sort(fnsort) diff --git a/src/test_bsv/tests/test_pinmux.py b/src/test_bsv/tests/test_pinmux.py index a3aa80c..7fef0ac 100644 --- a/src/test_bsv/tests/test_pinmux.py +++ b/src/test_bsv/tests/test_pinmux.py @@ -29,8 +29,8 @@ def pinmux_basic_test(dut): if dut.iocell_side_io2_cell_out != 0: raise TestFailure( - "gpioa_a2=0/mux=0/out=1 %s iocell_io2 != 0" % \ - str(dut.iocell_side_io2_cell_out )) + "gpioa_a2=0/mux=0/out=1 %s iocell_io2 != 0" % + str(dut.iocell_side_io2_cell_out)) dut.peripheral_side_gpioa_a2_out_in = 1 @@ -38,14 +38,14 @@ def pinmux_basic_test(dut): if dut.iocell_side_io2_cell_out != 1: raise TestFailure( - "gpioa_a2=0/mux=0/out=1 %s iocell_io2 != 1" % \ - str(dut.iocell_side_io2_cell_out )) + "gpioa_a2=0/mux=0/out=1 %s iocell_io2 != 1" % + str(dut.iocell_side_io2_cell_out)) # GPIO2-in test (first see if it's tri-state) if str(dut.peripheral_side_gpioa_a2_in) != "x": raise TestFailure( - "gpioa_a2=0/mux=0/out=1 %s gpio_a2_in != x" % \ - str(dut.peripheral_side_gpioa_a2_in)) + "gpioa_a2=0/mux=0/out=1 %s gpio_a2_in != x" % + str(dut.peripheral_side_gpioa_a2_in)) dut.peripheral_side_gpioa_a2_outen_in = 0 dut.iocell_side_io2_cell_in_in = 0 @@ -53,27 +53,26 @@ def pinmux_basic_test(dut): if dut.peripheral_side_gpioa_a2_in != 0: raise TestFailure( - "iocell_io2=0/mux=0/out=0 %s gpioa_a2 != 0" % \ - str(dut.peripheral_side_gpioa_a2_in)) + "iocell_io2=0/mux=0/out=0 %s gpioa_a2 != 0" % + str(dut.peripheral_side_gpioa_a2_in)) dut.iocell_side_io2_cell_in_in = 1 yield Timer(2) if dut.peripheral_side_gpioa_a2_in != 1: raise TestFailure( - "iocell_io2=1/mux=0/out=0 %s gpioa_a2 != 1" % \ - str(dut.peripheral_side_gpioa_a2_in)) + "iocell_io2=1/mux=0/out=0 %s gpioa_a2 != 1" % + str(dut.peripheral_side_gpioa_a2_in)) dut.peripheral_side_gpioa_a2_outen_in = 1 dut.iocell_side_io2_cell_in_in = 0 yield Timer(2) - dut._log.info("gpioa_a2_in %s" % dut.peripheral_side_gpioa_a2_in ) - + dut._log.info("gpioa_a2_in %s" % dut.peripheral_side_gpioa_a2_in) if dut.iocell_side_io2_cell_out != 1: raise TestFailure( - "gpioa_a2=0/mux=0/out=1 %s iocell_io2 != 1" % \ - str(dut.iocell_side_io2_cell_out )) + "gpioa_a2=0/mux=0/out=1 %s iocell_io2 != 1" % + str(dut.iocell_side_io2_cell_out)) # UART yield Timer(2) @@ -84,8 +83,8 @@ def pinmux_basic_test(dut): if dut.iocell_side_io0_cell_out != 1: raise TestFailure( - "uart_tx=1/mux=0/out=1 %s iocell_io0 != 1" % \ - str(dut.iocell_side_io0_cell_out )) + "uart_tx=1/mux=0/out=1 %s iocell_io0 != 1" % + str(dut.iocell_side_io0_cell_out)) dut.peripheral_side_uart_tx_in = 0 @@ -93,8 +92,8 @@ def pinmux_basic_test(dut): if dut.iocell_side_io0_cell_out != 0: raise TestFailure( - "uart_tx=0/mux=0/out=1 %s iocell_io0 != 0" % \ - str(dut.iocell_side_io0_cell_out )) + "uart_tx=0/mux=0/out=1 %s iocell_io0 != 0" % + str(dut.iocell_side_io0_cell_out)) dut._log.info("Ok!") yield Timer(2)