From: Matt Turner Date: Thu, 18 May 2017 19:02:39 +0000 (-0700) Subject: i965: Add a cache_coherent field to brw_bo X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=47bb4985346a1ae7d8da06c591e7a3f05068ee99;p=mesa.git i965: Add a cache_coherent field to brw_bo Reviewed-by: Kenneth Graunke --- diff --git a/src/mesa/drivers/dri/i965/brw_bufmgr.c b/src/mesa/drivers/dri/i965/brw_bufmgr.c index 9a65d32dd0a..2b42182d265 100644 --- a/src/mesa/drivers/dri/i965/brw_bufmgr.c +++ b/src/mesa/drivers/dri/i965/brw_bufmgr.c @@ -351,6 +351,7 @@ retry: bo->name = name; p_atomic_set(&bo->refcount, 1); bo->reusable = true; + bo->cache_coherent = bufmgr->has_llc; pthread_mutex_unlock(&bufmgr->lock); diff --git a/src/mesa/drivers/dri/i965/brw_bufmgr.h b/src/mesa/drivers/dri/i965/brw_bufmgr.h index 1e3e8cff456..6ce14bbcba6 100644 --- a/src/mesa/drivers/dri/i965/brw_bufmgr.h +++ b/src/mesa/drivers/dri/i965/brw_bufmgr.h @@ -123,6 +123,11 @@ struct brw_bo { * Boolean of whether this buffer can be re-used */ bool reusable; + + /** + * Boolean of whether this buffer is cache coherent + */ + bool cache_coherent; }; #define BO_ALLOC_FOR_RENDER (1<<0) diff --git a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c index ebf77b65501..34b8651b004 100644 --- a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c +++ b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c @@ -628,6 +628,9 @@ miptree_create(struct brw_context *brw, alloc_flags); } + if (layout_flags & MIPTREE_LAYOUT_FOR_SCANOUT) + mt->bo->cache_coherent = false; + return mt; }