From: bugzilla-daemon <bugzilla-daemon@libre-soc.org>
Date: Mon, 1 Jun 2020 12:01:22 +0000 (+0000)
Subject: [libre-riscv-dev] [Bug 336] ALU CompUnit needs to recognise that RA (src1) can be... 
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=47f81c9d3b37be6943ab28977a657f9d62857753;p=libre-riscv-dev.git

[libre-riscv-dev] [Bug 336] ALU CompUnit needs to recognise that RA (src1) can be zero
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diff --git a/7b/b358b562bd7766ea5eb3ccd1d16b56ea204b49 b/7b/b358b562bd7766ea5eb3ccd1d16b56ea204b49
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+Date: Mon, 01 Jun 2020 12:01:22 +0000
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+Subject: [libre-riscv-dev] [Bug 336] ALU CompUnit needs to recognise that RA
+ (src1) can be zero
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