From: Luke Kenneth Casson Leighton <lkcl@lkcl.net>
Date: Mon, 25 Feb 2019 08:15:57 +0000 (+0000)
Subject: invert stb/ack between add1 and add2
X-Git-Tag: ls180-24jan2020~1829
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=480f720419c71a37c10ae78d28832f9757d74e91;p=ieee754fpu.git

invert stb/ack between add1 and add2
---

diff --git a/src/add/dual_add_experiment.py b/src/add/dual_add_experiment.py
index 815192c4..7ec479f5 100644
--- a/src/add/dual_add_experiment.py
+++ b/src/add/dual_add_experiment.py
@@ -52,7 +52,7 @@ class ALU:
         # join add2 a to c: add2.in_a = c
         m.d.comb += self.add2.in_a.chain_from(self.c)
         # join add2 b to add1 z: add2.in_b = add1.out_z
-        m.d.comb += self.add2.in_b.chain_from(self.add1.out_z)
+        m.d.comb += self.add2.in_b.chain_inv(self.add1.out_z)
         # join output from add2 to z: z = add2.out_z
         m.d.comb += self.z.chain_from(self.add2.out_z)
         # get at add1's stb signal
diff --git a/src/add/fpbase.py b/src/add/fpbase.py
index 5bf8e8c4..26528f62 100644
--- a/src/add/fpbase.py
+++ b/src/add/fpbase.py
@@ -342,6 +342,15 @@ class FPOp:
         self.stb = Signal(reset=0)
         self.ack = Signal()
 
+    def chain_inv(self, in_op, extra=None):
+        stb = in_op.stb
+        if extra is not None:
+            stb = stb & extra
+        return [self.v.eq(in_op.v),          # receive value
+                self.stb.eq(~stb),      # receive STB
+                in_op.ack.eq(~self.ack), # send ACK
+               ]
+
     def chain_from(self, in_op, extra=None):
         stb = in_op.stb
         if extra is not None:
diff --git a/src/add/test_dual.py b/src/add/test_dual.py
index 8e3a9d84..7d412c86 100644
--- a/src/add/test_dual.py
+++ b/src/add/test_dual.py
@@ -33,9 +33,9 @@ def get_case(dut, a, b, c):
     assert c_ack == 0
 
     while True:
-        yield
         out_z_stb = (yield dut.z.stb)
         if not out_z_stb:
+            yield
             continue
 
         out_z = yield dut.z.v
@@ -45,16 +45,8 @@ def get_case(dut, a, b, c):
         yield dut.b.stb.eq(0)
         yield dut.c.stb.eq(0)
         yield
-        yield
-        yield
-        yield
-        yield
-        yield
         yield dut.z.ack.eq(1)
         yield
-        yield
-        yield
-        yield
         break
 
     return out_z