From: lkcl Date: Fri, 22 Oct 2021 11:14:40 +0000 (+0100) Subject: (no commit message) X-Git-Tag: opf_rfc_ls005_v1~3564 X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=4848ced63112d3f4f07e6ae46f3038f9380b6323;p=libreriscv.git --- diff --git a/3d_gpu/architecture/dynamic_simd/slice.mdwn b/3d_gpu/architecture/dynamic_simd/slice.mdwn index 10a41ac4b..3e57cb834 100644 --- a/3d_gpu/architecture/dynamic_simd/slice.mdwn +++ b/3d_gpu/architecture/dynamic_simd/slice.mdwn @@ -14,6 +14,8 @@ b = b_s.sig # shorthand to make table smaller ## `a`'s Elements: +(TODO 1: shrink to only 4 partitions. TODO 2: convert to markdown) + @@ -59,6 +61,8 @@ So, slicing bits `3:6` of a 32-bit element of `a` must, because we have to match ## `b`'s Elements: +(TODO 1: shrink to only 4 partitions. TODO 2: convert to markdown) +
Bit #
@@ -107,6 +111,9 @@ So, slicing bits `3:6` of a 32-bit element of `a` must, because we have to match
Bit #
+(TODO: add an example of how this would then do e.g. an add (to another +SimdSignal of only 8 bits in length or so) +