From: Tim Newsome <tim@sifive.com>
Date: Fri, 9 Jun 2017 21:09:35 +0000 (-0700)
Subject: Make HiFive1 testing (mostly) work again
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=48611c513b2348c3e934449649d57932dd5bfe24;p=riscv-tests.git

Make HiFive1 testing (mostly) work again

Currently failing:
    DebugChangeString
    DebugFunctionCall
    InstantHaltTest
---

diff --git a/debug/targets/HiFive1/link.lds b/debug/targets/HiFive1/link.lds
index 1dbb99c..1e0645a 100755
--- a/debug/targets/HiFive1/link.lds
+++ b/debug/targets/HiFive1/link.lds
@@ -13,7 +13,7 @@ SECTIONS
   .data : { *(.data) }
 
   .sdata : {
-    _gp = . + 0x800;
+    __global_pointer$ = . + 0x800;
     *(.srodata.cst16) *(.srodata.cst8) *(.srodata.cst4) *(.srodata.cst2)
     *(.srodata*)
     *(.sdata .sdata.* .gnu.linkonce.s.*)
diff --git a/debug/targets/HiFive1/openocd.cfg b/debug/targets/HiFive1/openocd.cfg
index 72a5446..5bde59b 100644
--- a/debug/targets/HiFive1/openocd.cfg
+++ b/debug/targets/HiFive1/openocd.cfg
@@ -14,10 +14,13 @@ jtag newtap $_CHIPNAME cpu -irlen 5 -expected-id 0x10e31913
 
 set _TARGETNAME $_CHIPNAME.cpu
 target create $_TARGETNAME riscv -chain-position $_TARGETNAME
-$_TARGETNAME configure -work-area-phys 0x80000000 -work-area-size 8096 -work-area-backup 1 -rtos riscv
+$_TARGETNAME configure -work-area-phys 0x80000000 -work-area-size 8096 -work-area-backup 1
+#-rtos riscv
 
 flash bank my_first_flash fespi 0x20000000 0 0 0 $_TARGETNAME
 init
 #reset
 halt
 flash protect 0 64 last off
+
+echo "Ready for Remote Connections"