From: Will Schmidt <will_schmidt@vnet.ibm.com>
Date: Mon, 30 Mar 2020 16:13:33 +0000 (-0500)
Subject: Update bswap64-4 test for desired results
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=48c18af43faa50c768a440904d67cdf1fc40a703;p=gcc.git

Update bswap64-4 test for desired results

Update existing testcase powerpc/bswap64-4.c to
reflect that we generate ldbrx and stdbrx instructions
for newer cpu targets, versus the pair of lwbrx and stwbrx
instructions as seen on previous cpu targets.

2020-03-24  Will Schmidt  <will_schmidt@vnet.ibm.com>

gcc/testsuite/
	* gcc.target/powerpc/bswap64-4.c: Update scan-assembler
	expected results.
---

diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index 9304d92ec14..f893ca000d4 100644
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,8 @@
+2020-03-30  Will Schmidt  <will_schmidt@vnet.ibm.com>
+
+	* gcc.target/powerpc/bswap64-4.c: Update scan-assembler
+	expected results.
+
 2020-03-30  Jakub Jelinek  <jakub@redhat.com>
 
 	PR target/94343
diff --git a/gcc/testsuite/gcc.target/powerpc/bswap64-4.c b/gcc/testsuite/gcc.target/powerpc/bswap64-4.c
index 1f5ac0e5f09..a3c05539652 100644
--- a/gcc/testsuite/gcc.target/powerpc/bswap64-4.c
+++ b/gcc/testsuite/gcc.target/powerpc/bswap64-4.c
@@ -2,8 +2,10 @@
 /* { dg-skip-if "" { powerpc*-*-aix* } } */
 /* { dg-options "-O2 -mpowerpc64" } */
 /* { dg-require-effective-target ilp32 } */
-/* { dg-final { scan-assembler-times "lwbrx" 2 } } */
-/* { dg-final { scan-assembler-times "stwbrx" 2 } } */
+/* { dg-final { scan-assembler-times "lwbrx" 2 { target { ! has_arch_pwr7 } } } } */
+/* { dg-final { scan-assembler-times "stwbrx" 2 { target { ! has_arch_pwr7 } } } } */
+/* { dg-final { scan-assembler-times "ldbrx" 1 { target has_arch_pwr7 } } } */
+/* { dg-final { scan-assembler-times "stdbrx" 1 { target has_arch_pwr7 } } } */
 
 long long swap_load (long long *a) { return __builtin_bswap64 (*a); }
 long long swap_reg (long long a) { return __builtin_bswap64 (a); }