From: lkcl <lkcl@web>
Date: Sun, 9 Oct 2022 19:50:15 +0000 (+0100)
Subject: (no commit message)
X-Git-Tag: opf_rfc_ls005_v1~133
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=48e6074fd5b7eaf275a4cf76dada8a92cf5720a6;p=libreriscv.git

---

diff --git a/openpower/sv/rfc/ls002.mdwn b/openpower/sv/rfc/ls002.mdwn
index 839c61347..57c3cc526 100644
--- a/openpower/sv/rfc/ls002.mdwn
+++ b/openpower/sv/rfc/ls002.mdwn
@@ -114,9 +114,9 @@ Book I as a new Section 4.6.2.1
 Pseudocode:
 
 ```
-    bf16 = d0 || d1 || d2 # create BF16 immediate
-    fp32 = bf16 || [0]*16 # convert BF16 to FP32
-    FRS = DOUBLE(fp32)    # convert FP32 to FP64
+    bf16 <- d0 || d1 || d2 # create BF16 immediate
+    fp32 <- bf16 || [0]*16 # convert BF16 to FP32
+    FRS <- DOUBLE(fp32)    # convert FP32 to FP64
 ```
 
 Special registers altered: