From: lkcl <lkcl@web>
Date: Fri, 13 May 2022 19:42:02 +0000 (+0100)
Subject: (no commit message)
X-Git-Tag: opf_rfc_ls005_v1~2251
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=48ee893472061560a5845f1e1a72313aef6bdd7e;p=libreriscv.git

---

diff --git a/openpower/sv/SimpleV_rationale.mdwn b/openpower/sv/SimpleV_rationale.mdwn
index 90e858952..78347114f 100644
--- a/openpower/sv/SimpleV_rationale.mdwn
+++ b/openpower/sv/SimpleV_rationale.mdwn
@@ -547,6 +547,14 @@ side-effect of going down the parallel-processing rabbithole where
 the cost of providing "Traditional" programmabilility (Virtual Memory,
 SMP) is worse than counter-productive, it's often outright impossible.
 
+*<blockquote>
+Similar to how GPUs achieve astounding task-dedicated
+performance by giving
+ALUs 30% of total silicon area and sacrificing the ability to run
+General-Purpose programs, Aspex, Google's Tensor Processor and D-Matrix
+likewise took this route and made the same compromise.
+</blockquote>*
+
 **In short, we are in "Programmer's nightmare" territory**
 
 Having dug a proverbial hole that rivals the Grand Canyon, and