From: Luke Kenneth Casson Leighton Date: Fri, 19 Oct 2018 11:22:53 +0000 (+0100) Subject: clean up sv_reg_t class X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=4923dbd195b0aafccdaef89fd324bc75b76d6d31;p=riscv-isa-sim.git clean up sv_reg_t class --- diff --git a/riscv/sv_reg.h b/riscv/sv_reg.h index a29bcfc..5a38d09 100644 --- a/riscv/sv_reg.h +++ b/riscv/sv_reg.h @@ -14,9 +14,7 @@ public: uint64_t get_data() { return reg; } uint8_t get_width() { return elwidth; } - //operator uint32_t() { return (uint32_t)get_data(); } - operator uint64_t() { return (uint64_t)get_data(); } - //operator int64_t() { return (int64_t)get_data(); } + operator uint64_t() { return reg; } operator sv_sreg_t(); }; @@ -31,7 +29,7 @@ public: int64_t get_data() { return reg; } uint8_t get_width() { return elwidth; } - operator int64_t() { return (int64_t)get_data(); } + operator int64_t() { return reg; } operator sv_reg_t() { return sv_reg_t((uint64_t)reg, elwidth); } };