From: Luke Kenneth Casson Leighton <lkcl@lkcl.net>
Date: Mon, 26 Jul 2021 14:39:40 +0000 (+0100)
Subject: more whitespace
X-Git-Tag: DRAFT_SVP64_0_1~582
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=497d94891cecf22f74d85291a3d9a546d20bc1ab;p=libreriscv.git

more whitespace
---

diff --git a/docs/firststeps.mdwn b/docs/firststeps.mdwn
index 991dfc145..e70c4245a 100644
--- a/docs/firststeps.mdwn
+++ b/docs/firststeps.mdwn
@@ -133,18 +133,21 @@ an output into register `1`.
 
 Note that the initial values for registers `3` and `2` are `0x1234` and `0x4321`
 respectively, and this matches to the input parameters in the logs:
+
 ```
 inputs [SelectableInt(value=0x1234, bits=64), SelectableInt(value=0x4321, bits=64)]
 ```
 
 The simulator performs the actual computation, obtaining the result, and then
 updates the general-purpose register we used as an output parameter:
+
 ```
 results (SelectableInt(value=0x5555, bits=64),)
 writing gpr 1 SelectableInt(value=0x5555, bits=64) 0
 ```
 
 In the end, we see that our assertion indeed passes:
+
 ```
 __eq__ SelectableInt(value=0x5555, bits=64) SelectableInt(value=0x5555, bits=64)
 ```