From: Jeff Law <law@gcc.gnu.org>
Date: Mon, 10 Jun 1996 20:41:40 +0000 (-0600)
Subject: local-alloc.c (update_equiv_regs): Ignore insns that read or write registers that... 
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=49ddab16992f33d251e22ec575b936a98e276a0e;p=gcc.git

local-alloc.c (update_equiv_regs): Ignore insns that read or write registers that are likely to be spilled.

        * local-alloc.c (update_equiv_regs): Ignore insns that read or
        write registers that are likely to be spilled.

From-SVN: r12272
---

diff --git a/gcc/local-alloc.c b/gcc/local-alloc.c
index bde83b2e4c3..b8b8b9abd7c 100644
--- a/gcc/local-alloc.c
+++ b/gcc/local-alloc.c
@@ -973,7 +973,7 @@ update_equiv_regs ()
     {
       rtx note;
       rtx set = single_set (insn);
-      rtx dest;
+      rtx dest, src;
       int regno;
 
       if (GET_CODE (insn) == NOTE)
@@ -989,6 +989,7 @@ update_equiv_regs ()
 	continue;
 
       dest = SET_DEST (set);
+      src = SET_SRC (set);
 
       /* If this sets a MEM to the contents of a REG that is only used
 	 in a single basic block, see if the register is always equivalent
@@ -1024,10 +1025,15 @@ update_equiv_regs ()
 	optimize_reg_copy_2 (insn, dest, SET_SRC (set));
 
       /* Otherwise, we only handle the case of a pseudo register being set
-	 once.  */
+	 once and only if neither the source nor the destination are
+	 in a register class that's likely to be spilled.  */
       if (GET_CODE (dest) != REG
 	  || (regno = REGNO (dest)) < FIRST_PSEUDO_REGISTER
-	  || reg_n_sets[regno] != 1)
+	  || reg_n_sets[regno] != 1
+	  || CLASS_LIKELY_SPILLED_P (reg_preferred_class (REGNO (dest)))
+	  || (GET_CODE (src) == REG
+	      && REGNO (src) >= FIRST_PSEUDO_REGISTER
+	      && CLASS_LIKELY_SPILLED_P (reg_preferred_class (REGNO (src)))))
 	continue;
 
       note = find_reg_note (insn, REG_EQUAL, NULL_RTX);