From: Jordan Justen Date: Tue, 16 Apr 2019 07:42:45 +0000 (-0700) Subject: intel/l3: Don't rely on cfg entry URB size being 0 as a sentinal X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=49fe43e15fdfc5be4523638776cb2a96f92e04f0;p=mesa.git intel/l3: Don't rely on cfg entry URB size being 0 as a sentinal An example entry with URB size being 0 is in the cnl list. Signed-off-by: Jordan Justen Reviewed-by: Lionel Landwerlin Reviewed-by: Jason Ekstrand Part-of: --- diff --git a/src/intel/common/gen_l3_config.c b/src/intel/common/gen_l3_config.c index d54368556d3..328aa5bebda 100644 --- a/src/intel/common/gen_l3_config.c +++ b/src/intel/common/gen_l3_config.c @@ -29,6 +29,15 @@ #include "gen_l3_config.h" +struct gen_l3_list { + const struct gen_l3_config *configs; + int length; +}; + +#define DECLARE_L3_LIST(hw) \ + struct gen_l3_list hw##_l3_list = \ + { .configs = hw##_l3_configs, .length = ARRAY_SIZE(hw##_l3_configs) } + /** * IVB/HSW validated L3 configurations. The first entry will be used as * default by gen7_restore_default_l3_config(), otherwise the ordering is @@ -50,8 +59,8 @@ static const struct gen_l3_config ivb_l3_configs[] = { {{ 16, 16, 0, 4, 0, 8, 4, 16 }}, {{ 16, 16, 0, 4, 0, 16, 4, 8 }}, {{ 16, 16, 0, 0, 32, 0, 0, 0 }}, - {{ 0 }} }; +DECLARE_L3_LIST(ivb); /** * VLV validated L3 configurations. \sa ivb_l3_configs. @@ -66,8 +75,8 @@ static const struct gen_l3_config vlv_l3_configs[] = { {{ 32, 32, 0, 16, 16, 0, 0, 0 }}, {{ 32, 40, 0, 8, 16, 0, 0, 0 }}, {{ 32, 40, 0, 16, 8, 0, 0, 0 }}, - {{ 0 }} }; +DECLARE_L3_LIST(vlv); /** * BDW validated L3 configurations. \sa ivb_l3_configs. @@ -82,8 +91,8 @@ static const struct gen_l3_config bdw_l3_configs[] = { {{ 24, 16, 48, 0, 0, 0, 0, 0 }}, {{ 24, 16, 0, 16, 32, 0, 0, 0 }}, {{ 24, 16, 0, 32, 16, 0, 0, 0 }}, - {{ 0 }} }; +DECLARE_L3_LIST(bdw); /** * CHV/SKL validated L3 configurations. \sa ivb_l3_configs. @@ -98,8 +107,8 @@ static const struct gen_l3_config chv_l3_configs[] = { {{ 32, 16, 48, 0, 0, 0, 0, 0 }}, {{ 32, 16, 0, 16, 32, 0, 0, 0 }}, {{ 32, 16, 0, 32, 16, 0, 0, 0 }}, - {{ 0 }} }; +DECLARE_L3_LIST(chv); /** * BXT 2x6 validated L3 configurations. \sa ivb_l3_configs. @@ -112,8 +121,8 @@ static const struct gen_l3_config bxt_2x6_l3_configs[] = { {{ 16, 16, 48, 0, 0, 0, 0, 0 }}, {{ 16, 16, 0, 40, 8, 0, 0, 0 }}, {{ 16, 16, 0, 16, 32, 0, 0, 0 }}, - {{ 0 }} }; +DECLARE_L3_LIST(bxt_2x6); /** * CNL validated L3 configurations. \sa ivb_l3_configs. @@ -129,8 +138,8 @@ static const struct gen_l3_config cnl_l3_configs[] = { {{ 32, 16, 80, 0, 0, 0, 0, 0 }}, {{ 32, 16, 0, 64, 16, 0, 0, 0 }}, {{ 32, 0, 96, 0, 0, 0, 0, 0 }}, - {{ 0 }} }; +DECLARE_L3_LIST(cnl); /** * ICL validated L3 configurations. \sa icl_l3_configs. @@ -143,8 +152,8 @@ static const struct gen_l3_config icl_l3_configs[] = { /* SLM URB ALL DC RO IS C T */ /*{{ 0, 16, 80, 0, 0, 0, 0, 0 }},*/ {{ 0, 32, 64, 0, 0, 0, 0, 0 }}, - {{ 0 }} }; +DECLARE_L3_LIST(icl); /** * TGL validated L3 configurations. \sa tgl_l3_configs. @@ -153,36 +162,36 @@ static const struct gen_l3_config tgl_l3_configs[] = { /* SLM URB ALL DC RO IS C T */ {{ 0, 32, 88, 0, 0, 0, 0, 0 }}, {{ 0, 16, 104, 0, 0, 0, 0, 0 }}, - {{ 0 }} }; +DECLARE_L3_LIST(tgl); /** * Return a zero-terminated array of validated L3 configurations for the * specified device. */ -static const struct gen_l3_config * -get_l3_configs(const struct gen_device_info *devinfo) +static const struct gen_l3_list * +get_l3_list(const struct gen_device_info *devinfo) { switch (devinfo->gen) { case 7: - return (devinfo->is_baytrail ? vlv_l3_configs : ivb_l3_configs); + return (devinfo->is_baytrail ? &vlv_l3_list : &ivb_l3_list); case 8: - return (devinfo->is_cherryview ? chv_l3_configs : bdw_l3_configs); + return (devinfo->is_cherryview ? &chv_l3_list : &bdw_l3_list); case 9: if (devinfo->l3_banks == 1) - return bxt_2x6_l3_configs; - return chv_l3_configs; + return &bxt_2x6_l3_list; + return &chv_l3_list; case 10: - return cnl_l3_configs; + return &cnl_l3_list; case 11: - return icl_l3_configs; + return &icl_l3_list; case 12: - return tgl_l3_configs; + return &tgl_l3_list; default: unreachable("Not implemented"); @@ -284,7 +293,8 @@ gen_get_default_l3_config(const struct gen_device_info *devinfo) /* For efficiency assume that the first entry of the array matches the * default configuration. */ - const struct gen_l3_config *const cfg = get_l3_configs(devinfo); + const struct gen_l3_list *const list = get_l3_list(devinfo); + const struct gen_l3_config *const cfg = &list->configs[0]; assert(cfg == gen_get_l3_config(devinfo, gen_get_default_l3_weights(devinfo, false, false))); return cfg; @@ -298,11 +308,13 @@ const struct gen_l3_config * gen_get_l3_config(const struct gen_device_info *devinfo, struct gen_l3_weights w0) { - const struct gen_l3_config *const cfgs = get_l3_configs(devinfo); + const struct gen_l3_list *const list = get_l3_list(devinfo); + const struct gen_l3_config *const cfgs = list->configs; const struct gen_l3_config *cfg_best = NULL; float dw_best = HUGE_VALF; - for (const struct gen_l3_config *cfg = cfgs; cfg->n[GEN_L3P_URB]; cfg++) { + for (int i = 0; i < list->length; i++) { + const struct gen_l3_config *cfg = &cfgs[i]; const float dw = gen_diff_l3_weights(w0, gen_get_l3_config_weights(cfg)); if (dw < dw_best) {