From: Giacomo Travaglini Date: Wed, 29 Jul 2020 11:25:25 +0000 (+0100) Subject: dev-arm: Fix DTB autogen for HDLcd X-Git-Tag: v20.1.0.0~364 X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=4a309ae7475b810d16790a1995513a4b30c86837;p=gem5.git dev-arm: Fix DTB autogen for HDLcd The HDLcd was wrongly reporting the hardcoded IRQ=63 as the interrupt number during DTB autogeneration. This is because the DTS is using 63. However that corresponds to the SPI offset; the gem5 helper is instead expecting the global IRQ number = 32 + SPI offset Change-Id: I9e82360843eacb13cef5ddd2e28d2f3ef3147335 Signed-off-by: Giacomo Travaglini Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/31940 Reviewed-by: Andreas Sandberg Maintainer: Andreas Sandberg Tested-by: kokoro --- diff --git a/src/dev/arm/RealView.py b/src/dev/arm/RealView.py index b206a3ff2..5bfc12e87 100644 --- a/src/dev/arm/RealView.py +++ b/src/dev/arm/RealView.py @@ -522,9 +522,8 @@ class HDLcd(AmbaDmaDevice): port_node = FdtNode("port") port_node.append(endpoint_node) - # Interrupt number is hardcoded; it is not a property of this class node = self.generateBasicPioDeviceNode(state, 'hdlcd', - self.pio_addr, 0x1000, [63]) + self.pio_addr, 0x1000, [ self.interrupt.num ]) node.appendCompatible(["arm,hdlcd"]) node.append(FdtPropertyWords("clocks", state.phandle(self.pxl_clk)))