From: Shriya Sharma <shriya@redsemiconductor.com>
Date: Fri, 27 Oct 2023 10:44:32 +0000 (+0100)
Subject: added english language description for ldsux instruction
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=4a371139ac764cd2c4a21bdcc753eeb1fba0b4bd;p=openpower-isa.git

added english language description for ldsux instruction
---

diff --git a/openpower/isa/fixedloadshift.mdwn b/openpower/isa/fixedloadshift.mdwn
index f7df8135..4423123a 100644
--- a/openpower/isa/fixedloadshift.mdwn
+++ b/openpower/isa/fixedloadshift.mdwn
@@ -321,6 +321,17 @@ Pseudo-code:
     RT <- MEM(EA, 8)
     RA <- EA
 
+Description:
+
+    Let the effective address (EA) be the sum of the contents of
+    register RB shifted by (SH+1), and (RA).
+
+    The doubleword in storage addressed by EA is loaded into RT.
+
+    EA is placed into register RA.
+
+    If RA=0 or RA=RT, the instruction form is invalid.
+
 Special Registers Altered:
 
     None