From: Matt Turner Date: Thu, 29 Aug 2013 00:03:22 +0000 (-0700) Subject: i965: Remove never used RSR and RSL opcodes. X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=4a6100054c1702e08fea898d6a30050aadf36bcb;p=mesa.git i965: Remove never used RSR and RSL opcodes. RSR and RSL are listed in the "Defeatured Instructions" section of the 965 PRM, Volume 4: "The following instructions are removed from Gen4 implementation mainly due to implementation cost/schedule reasons. They are candidates for future generations." Reviewed-by: Kenneth Graunke --- diff --git a/src/mesa/drivers/dri/i965/brw_defines.h b/src/mesa/drivers/dri/i965/brw_defines.h index ec6c854e906..7040a270d41 100644 --- a/src/mesa/drivers/dri/i965/brw_defines.h +++ b/src/mesa/drivers/dri/i965/brw_defines.h @@ -691,8 +691,6 @@ enum opcode { BRW_OPCODE_XOR = 7, BRW_OPCODE_SHR = 8, BRW_OPCODE_SHL = 9, - BRW_OPCODE_RSR = 10, - BRW_OPCODE_RSL = 11, BRW_OPCODE_ASR = 12, BRW_OPCODE_CMP = 16, BRW_OPCODE_CMPN = 17, diff --git a/src/mesa/drivers/dri/i965/brw_eu.h b/src/mesa/drivers/dri/i965/brw_eu.h index 387450bb025..6ac1c684d21 100644 --- a/src/mesa/drivers/dri/i965/brw_eu.h +++ b/src/mesa/drivers/dri/i965/brw_eu.h @@ -154,8 +154,6 @@ ALU2(OR) ALU2(XOR) ALU2(SHR) ALU2(SHL) -ALU2(RSR) -ALU2(RSL) ALU2(ASR) ALU1(F32TO16) ALU1(F16TO32) diff --git a/src/mesa/drivers/dri/i965/brw_eu_emit.c b/src/mesa/drivers/dri/i965/brw_eu_emit.c index ecf8597823f..f26c9135658 100644 --- a/src/mesa/drivers/dri/i965/brw_eu_emit.c +++ b/src/mesa/drivers/dri/i965/brw_eu_emit.c @@ -936,8 +936,6 @@ ALU2(OR) ALU2(XOR) ALU2(SHR) ALU2(SHL) -ALU2(RSR) -ALU2(RSL) ALU2(ASR) ALU1(F32TO16) ALU1(F16TO32) diff --git a/src/mesa/drivers/dri/i965/brw_fs_cse.cpp b/src/mesa/drivers/dri/i965/brw_fs_cse.cpp index e715c3767b9..ccd4e5edd1e 100644 --- a/src/mesa/drivers/dri/i965/brw_fs_cse.cpp +++ b/src/mesa/drivers/dri/i965/brw_fs_cse.cpp @@ -53,8 +53,6 @@ is_expression(const fs_inst *const inst) case BRW_OPCODE_XOR: case BRW_OPCODE_SHR: case BRW_OPCODE_SHL: - case BRW_OPCODE_RSR: - case BRW_OPCODE_RSL: case BRW_OPCODE_ASR: case BRW_OPCODE_ADD: case BRW_OPCODE_MUL: