From: Joseph Myers Date: Sat, 25 Oct 2014 00:23:17 +0000 (+0100) Subject: Only allow e500 double in SPE_SIMD_REGNO_P registers. X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=4aa19422932112527ceb8cd3dd290bd9ff2b990c;p=gcc.git Only allow e500 double in SPE_SIMD_REGNO_P registers. rs6000_hard_regno_nregs_internal allows SPE vectors in single registers satisfying SPE_SIMD_REGNO_P (i.e. register numbers 0 to 31). However, the corresponding test for e500 double treats all registers as being able to store a 64-bit value, rather than just those GPRs. Logically this inconsistency is wrong; in addition, it causes problems unwinding from signal handlers. linux-unwind.h uses ARG_POINTER_REGNUM as a place to store the return address from a signal handler, but this logic in rs6000_hard_regno_nregs_internal results in that being considered an 8-byte register, resulting in assertion failures. ( first needs to be applied for unwinding to work in general on e500.) This patch makes rs6000_hard_regno_nregs_internal handle the e500 double case consistently with SPE vectors. Tested with no regressions with cross to powerpc-linux-gnuspe (given the aforementioned patch applied). Failures of signal handling unwinding tests such as gcc.dg/cleanup-{8,9,10,11}.c are fixed by this patch. * config/rs6000/rs6000.c (rs6000_hard_regno_nregs_internal): Do not allow e500 double in registers not satisyfing SPE_SIMD_REGNO_P. From-SVN: r216688 --- diff --git a/gcc/ChangeLog b/gcc/ChangeLog index bc6908db3b1..2b94c2b40a6 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,9 @@ +2014-10-25 Joseph Myers + + * config/rs6000/rs6000.c (rs6000_hard_regno_nregs_internal): Do + not allow e500 double in registers not satisyfing + SPE_SIMD_REGNO_P. + 2014-10-24 Aldy Hernandez * dwarf2out.c (declare_in_namespace): Only emit external diff --git a/gcc/config/rs6000/rs6000.c b/gcc/config/rs6000/rs6000.c index 2f14c2b6c3e..a5e5bcf1fef 100644 --- a/gcc/config/rs6000/rs6000.c +++ b/gcc/config/rs6000/rs6000.c @@ -1721,7 +1721,7 @@ rs6000_hard_regno_nregs_internal (int regno, enum machine_mode mode) SCmode so as to pass the value correctly in a pair of registers. */ else if (TARGET_E500_DOUBLE && FLOAT_MODE_P (mode) && mode != SCmode - && !DECIMAL_FLOAT_MODE_P (mode)) + && !DECIMAL_FLOAT_MODE_P (mode) && SPE_SIMD_REGNO_P (regno)) reg_size = UNITS_PER_FP_WORD; else