From: Monk Chiang <sh.chiang04@gmail.com>
Date: Sun, 10 Feb 2019 09:09:19 +0000 (+0000)
Subject: [NDS32] Refine register dwarf span.
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=4b23af6dae69976a50c038f44b335db96c1a286a;p=gcc.git

[NDS32] Refine register dwarf span.

gcc/
	* config/nds32/nds32.c (nds32_dwarf_register_span): Refine register
	dwarf span.

From-SVN: r268739
---

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 44183354d8f..5c415d8b134 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,8 @@
+2019-02-10  Monk Chiang  <sh.chiang04@gmail.com>
+
+	* config/nds32/nds32.c (nds32_dwarf_register_span): Refine register
+	dwarf span.
+
 2019-02-10  Chung-Ju Wu  <jasonwucj@gmail.com>
 
 	* config/nds32/nds32-md-auxiliary.c (nds32_spilt_doubleword): Support
diff --git a/gcc/config/nds32/nds32.c b/gcc/config/nds32/nds32.c
index 6702b765bec..283e189a177 100644
--- a/gcc/config/nds32/nds32.c
+++ b/gcc/config/nds32/nds32.c
@@ -3867,11 +3867,9 @@ nds32_dwarf_register_span (rtx reg)
 				   gen_rtvec (4, dwarf_low_re, dwarf_high_re,
 						 dwarf_high_im, dwarf_low_im));
 	}
-      else if (mode == SFmode || mode == SImode)
+      else if (GET_MODE_SIZE (mode) <= UNITS_PER_WORD)
 	{
-	  /* Create new dwarf information with adjusted register number.  */
-	  dwarf_single = gen_rtx_REG (word_mode, regno);
-	  return gen_rtx_PARALLEL (VOIDmode, gen_rtvec (1, dwarf_single));
+	  return NULL_RTX;
 	}
       else
 	{