From: lkcl <lkcl@web>
Date: Fri, 24 Jun 2022 20:56:19 +0000 (+0100)
Subject: (no commit message)
X-Git-Tag: opf_rfc_ls005_v1~1534
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=4b76cd124629929d6ad80fc831add346e3c53206;p=libreriscv.git

---

diff --git a/openpower/sv/remap.mdwn b/openpower/sv/remap.mdwn
index 6c87fa3fd..5ff2c0bf9 100644
--- a/openpower/sv/remap.mdwn
+++ b/openpower/sv/remap.mdwn
@@ -250,20 +250,21 @@ covering much of Indexed REMAP capability.
 
 Form: SVI-Form SV "Indexed" Form (see [[isatables/fields.text]])
 
-    svindex RS,mask,SVd,ew,yz,mr,sk
+    svindex RS,rmm,SVd,ew,yz,mr,sk
 
 | 0.5|6.10 |11.15  |16.20 | 21..25      | 26..31|  name    | Form |
 | -- | --  | ---   | ---- | ----------- | ------| -------- | ---- |
-|OPCD| RS  | mask  | SVd  | ew/yx/mm/sk | XO    | svindex | SVI-Form |
+|OPCD| RS  | rmm   | SVd  | ew/yx/mm/sk | XO    | svindex | SVI-Form |
 
 Fields:
 
 * **SVd** - SV REMAP x/y dim 
-* **mask** - sets remap mi0-2/mo0-1 and SVSHAPEs, controlled by mm
+* **rmm** - REMAP mask: sets remap mi0-2/mo0-1 and SVSHAPEs,
+  controlled by mm
 * **ew** - sets element width override
 * **RS** - GPR RS<<2 to be used for Indexing
 * **yx** - 2D reordering to be used if yx=1
-* **mm** - mask mode. determines how mask is interpreted.
+* **mm** - mask mode. determines how `rmm` is interpreted.
 * **sk** - Dimension skipping enabled
 * **XO** - standard 6-bit XO field
 
@@ -273,37 +274,37 @@ mnemonic the values `1-32` are stored in binary as `0b00000..0b11111`*
 
 When `mm=0`:
 
-* mask, like REMAP.SVme, has bit 0 
+* `rmm`, like REMAP.SVme, has bit 0 
   correspond to mi0, bit 1 to mi1, bit 2 to mi2,
   bit 3 to mo0 and bit 4 to mi1
 * all SVSHAPEs and the REMAP SPR are first reset (initialised to zero)
-* for each bit set in the 5-bit mask, in order, the first
+* for each bit set in the 5-bit `rmm`, in order, the first
   as-yet-unset SVSHAPE will be updated
   with the other operands in the instruction, and the REMAP
   SPR set.
-* If all 5 bits of mask are set then both mi0 and mo1 use SVSHAPE0.
+* If all 5 bits of `rmm` are set then both mi0 and mo1 use SVSHAPE0.
 
-Example 1: if mask=0b00110 then SVSHAPE0 and SVSHAPE1 are set up,
+Example 1: if rmm=0b00110 then SVSHAPE0 and SVSHAPE1 are set up,
 and the REMAP SPR set so that mi1 uses SVSHAPE0 and mi2
 uses mi2.  REMAP.SVme is also set to 0b00110, REMAP.mi1=0
 (SVSHAPE0) and REMAP.mi2=1 (SVSHAPE1)
 
-Example 2: if mask=0b10001 then again SVSHAPE0 and SVSHAPE1
+Example 2: if rmm=0b10001 then again SVSHAPE0 and SVSHAPE1
 are set up, but the REMAP SPR is set so that mi0 uses SVSHAPE0
 and mo1 uses SVSHAPE1. REMAP.SVme=0b10001, REMAP.mi0=0, REMAP.mo1=1
 
 When `mm=1`:
 
-* bits 0-2 of mask indicate an index selecting mi0-mo1
-* bits 3-4 of mask indicate which SVSHAPE 0-3 shall be updated
+* bits 0-2 of `rmm` indicate an index selecting mi0-mo1
+* bits 3-4 of `rmm` indicate which SVSHAPE 0-3 shall be updated
 * only the selected SVSHAPE is overwritten
 * only the relevant bits in the REMAP SPR are updated
 
-Example 1: if mask=0b10011 then mo0 is selected and SVSHAPE2
+Example 1: if `rmm`=0b10011 then mo0 is selected and SVSHAPE2
 to be updated. REMAP.SVme[3] will be set high and REMAP.mo0
 set to 2 (SVSHAPE2).
 
-Example 2: if mask=0b11100 then mo1 is selected and SVSHAPE3
+Example 2: if `rmm`=0b11100 then mo1 is selected and SVSHAPE3
 to be updated. REMAP.SVme[4] will be set high and REMAP.mo1
 set to 3 (SVSHAPE3).