From: lkcl <lkcl@web>
Date: Sat, 22 Apr 2023 09:31:11 +0000 (+0100)
Subject: (no commit message)
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=4b80f75eef97b6c64e63699f187b01dec68ae10c;p=libreriscv.git

---

diff --git a/openpower/sv/bitmanip.mdwn b/openpower/sv/bitmanip.mdwn
index 2c00e1d77..1245287e6 100644
--- a/openpower/sv/bitmanip.mdwn
+++ b/openpower/sv/bitmanip.mdwn
@@ -458,30 +458,38 @@ locations in green using the upper 4 bits of the immediate.
 demo code [[openpower/sv/grevlut.py]]
 
 ```
-lut2(imm, a, b):
+def lut2(imm, a, b):
     idx = b << 1 | a
-    return imm[idx] # idx by LSB0 order
-
-dorow(imm8, step_i, chunksize, us32b):
-    for j in 0 to 31 if is32b else 63:
-        if (j&chunk_size) == 0
-           imm = imm8[0..3]
-        else
-           imm = imm8[4..7]
-        step_o[j] = lut2(imm, step_i[j], step_i[j ^ chunk_size])
+    return (imm>>idx) & 1
+
+def dorow(imm8, step_i, chunk_size):
+    step_o = 0
+    for j in range(64):
+        if (j&chunk_size) == 0:
+           imm = (imm8 & 0b1111)
+        else:
+           imm = (imm8>>4)
+        a = (step_i>>j)&1
+        b = (step_i>>(j ^ chunk_size))&1
+        res = lut2(imm, a, b)
+        #print(j, bin(imm), a, b, res)
+        step_o |= (res<<j)
+    #print ("  ", chunk_size, bin(step_o))
     return step_o
 
-uint64_t grevlut(uint64_t RA, uint64_t RB, uint8 imm, bool iv, bool is32b)
-{
-    uint64_t x = 0x5555_5555_5555_5555;
-    if (RA != 0) x = GPR(RA);
-    if (iv) x = ~x;
-    int shamt = RB & 31 if is32b else 63
-    for i in 0 to (6-is32b)
+def grevlut64(RA, RB, imm, iv):
+    x = 0
+    if RA is None: # RA=0
+        x = 0x5555555555555555
+    else:
+        x = RA
+    if (iv): x = ~x;
+    shamt = RB & 63;
+    for i in range(6):
         step = 1<<i
-        if (shamt & step) x = dorow(imm, x, step, is32b)
-    return x;
-}
+        if (shamt & step):
+            x = dorow(imm, x, step)
+    return x & ((1<<64)-1)
 ```
 
 A variant may specify different LUT-pairs per row,